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LTDC STM32H753 Debug crashes

Franksterb92
Senior

wrote a basic test for ltdc and if i change any of the ltdc registers and pause the debug it crashes heres the functions for the ltdc ive wrote

 

 

void ltdc_gpio_init(void){ //GPIO B,C,D,E,F,G,H,I,J,K Clock Access RCC->AHB4ENR |= (1U<<1);//PORTB RCC->AHB4ENR |= (1U<<2);//PORTC RCC->AHB4ENR |= (1U<<3);//PORTD RCC->AHB4ENR |= (1U<<4);//PORTE RCC->AHB4ENR |= (1U<<5);//PORTF RCC->AHB4ENR |= (1U<<6);//PORTG RCC->AHB4ENR |= (1U<<7);//PORTH RCC->AHB4ENR |= (1U<<8);//PORTI RCC->AHB4ENR |= (1U<<9);//PORTJ RCC->AHB4ENR |= (1U<<10);//PORTK //MODE GPIOB->MODER |= (1U<<3);//PB1 AF MODE GPIOB->MODER &=~(1U<<2); GPIOC->MODER |= (1U<<1);//PC0 AF MODE GPIOC->MODER &=~(1U<<0); GPIOD->MODER |= (1U<<13);//PD6 AF MODE GPIOD->MODER &=~(1U<<12); GPIOE->MODER |= (1U<<9);//PE4 AF MODE GPIOE->MODER &=~(1U<<8); GPIOE->MODER |= (1U<<11);//PE5 AF MODE GPIOE->MODER &=~(1U<<10); GPIOE->MODER |= (1U<<13);//PE6 AF MODE GPIOE->MODER &=~(1U<<12); GPIOF->MODER |= (1U<<21);//PF10 AF MODE GPIOF->MODER &=~(1U<<20); GPIOG->MODER |= (1U<<15);//PG7 AF MODE GPIOG->MODER &=~(1U<<14); GPIOG->MODER |= (1U<<21);//PG10 AF MODE GPIOG->MODER &=~(1U<<20); GPIOG->MODER |= (1U<<23);//PG11 AF MODE GPIOG->MODER &=~(1U<<22); GPIOG->MODER |= (1U<<25);//PG12 AF MODE GPIOG->MODER &=~(1U<<24); GPIOH->MODER |= (1U<<5);//PH2 AF MODE GPIOH->MODER &=~(1U<<4); GPIOH->MODER |= (1U<<7);//PH3 AF MODE GPIOH->MODER &=~(1U<<6); GPIOH->MODER |= (1U<<17);//PH8 AF MODE GPIOH->MODER &=~(1U<<16); GPIOH->MODER |= (1U<<19);//PH9 AF MODE GPIOH->MODER &=~(1U<<18); GPIOH->MODER |= (1U<<21);//PH10 AF MODE GPIOH->MODER &=~(1U<<20); GPIOI->MODER |= (1U<<9);//PI4 AF MODE GPIOI->MODER &=~(1U<<8); GPIOI->MODER |= (1U<<11);//PI5 AF MODE GPIOI->MODER &=~(1U<<10); GPIOI->MODER |= (1U<<13);//PI6 AF MODE GPIOI->MODER &=~(1U<<12); GPIOI->MODER |= (1U<<15);//PI7 AF MODE GPIOI->MODER &=~(1U<<14); GPIOI->MODER |= (1U<<19);//PI9 AF MODE GPIOI->MODER &=~(1U<<18); GPIOI->MODER |= (1U<<21);//PI10 AF MODE GPIOI->MODER &=~(1U<<20); GPIOJ->MODER |= (1U<<13);//PJ6 AF MODE GPIOJ->MODER &=~(1U<<12); GPIOJ->MODER |= (1U<<19);//PJ9 AF MODE GPIOJ->MODER &=~(1U<<18); GPIOJ->MODER |= (1U<<23);//PJ11 AF MODE GPIOJ->MODER &=~(1U<<22); GPIOK->MODER |= (1U<<1);//PK0 AF MODE GPIOK->MODER &=~(1U<<0); GPIOK->MODER |= (1U<<3);//PK1 AF MODE GPIOK->MODER &=~(1U<<2); GPIOK->MODER |= (1U<<5);//PK2 AF MODE GPIOK->MODER &=~(1U<<4); //Alternate Function GPIOB->AFR[0] |= (1U<<7);//PB1 AF 14 GPIOB->AFR[0] |= (1U<<6); GPIOB->AFR[0] |= (1U<<5); GPIOB->AFR[0] &=~(1U<<4); GPIOC->AFR[0] |= (1U<<3);//PC0 AF 14 GPIOC->AFR[0] |= (1U<<2); GPIOC->AFR[0] |= (1U<<1); GPIOC->AFR[0] &=~(1U<<0); GPIOD->AFR[0] |= (1U<<27);//PD6 AF 14 GPIOD->AFR[0] |= (1U<<26); GPIOD->AFR[0] |= (1U<<25); GPIOD->AFR[0] &=~(1U<<24); GPIOE->AFR[0] |= (1U<<19);//PE4 AF 14 GPIOE->AFR[0] |= (1U<<18); GPIOE->AFR[0] |= (1U<<17); GPIOE->AFR[0] &=~(1U<<16); GPIOE->AFR[0] |= (1U<<23);//PE5 AF 14 GPIOE->AFR[0] |= (1U<<22); GPIOE->AFR[0] |= (1U<<21); GPIOE->AFR[0] &=~(1U<<20); GPIOE->AFR[0] |= (1U<<27);//PE6 AF 14 GPIOE->AFR[0] |= (1U<<26); GPIOE->AFR[0] |= (1U<<25); GPIOE->AFR[0] &=~(1U<<24); GPIOF->AFR[1] |= (1U<<11);//PF10 AF 14 GPIOF->AFR[1] |= (1U<<10); GPIOF->AFR[1] |= (1U<<9); GPIOF->AFR[1] &=~(1U<<8); GPIOG->AFR[0] |= (1U<<31);//PG7 AF 14 GPIOG->AFR[0] |= (1U<<30); GPIOG->AFR[0] |= (1U<<29); GPIOG->AFR[0] &=~(1U<<28); GPIOG->AFR[1] |= (1U<<11);//PG10 AF 14 GPIOG->AFR[1] |= (1U<<10); GPIOG->AFR[1] |= (1U<<9); GPIOG->AFR[1] &=~(1U<<8); GPIOG->AFR[1] |= (1U<<15);//PG11 AF 14 GPIOG->AFR[1] |= (1U<<14); GPIOG->AFR[1] |= (1U<<13); GPIOG->AFR[1] &=~(1U<<12); GPIOG->AFR[1] |= (1U<<19);//PG12 AF 14 GPIOG->AFR[1] |= (1U<<18); GPIOG->AFR[1] |= (1U<<17); GPIOG->AFR[1] &=~(1U<<16); GPIOH->AFR[0] |= (1U<<11);//PH2 AF 14 GPIOH->AFR[0] |= (1U<<10); GPIOH->AFR[0] |= (1U<<9); GPIOH->AFR[0] &=~(1U<<8); GPIOH->AFR[0] |= (1U<<15);//PH3 AF 14 GPIOH->AFR[0] |= (1U<<14); GPIOH->AFR[0] |= (1U<<13); GPIOH->AFR[0] &=~(1U<<12); GPIOH->AFR[1] |= (1U<<3);//PH8 AF 14 GPIOH->AFR[1] |= (1U<<2); GPIOH->AFR[1] |= (1U<<1); GPIOH->AFR[1] &=~(1U<<0); GPIOH->AFR[1] |= (1U<<7);//PH9 AF 14 GPIOH->AFR[1] |= (1U<<6); GPIOH->AFR[1] |= (1U<<5); GPIOH->AFR[1] &=~(1U<<4); GPIOH->AFR[1] |= (1U<<11);//PH10 AF 14 GPIOH->AFR[1] |= (1U<<10); GPIOH->AFR[1] |= (1U<<9); GPIOH->AFR[1] &=~(1U<<8); GPIOI->AFR[0] |= (1U<<19);//PI4 AF 14 GPIOI->AFR[0] |= (1U<<18); GPIOI->AFR[0] |= (1U<<17); GPIOI->AFR[0] &=~(1U<<16); GPIOI->AFR[0] |= (1U<<23);//PI5 AF 14 GPIOI->AFR[0] |= (1U<<22); GPIOI->AFR[0] |= (1U<<21); GPIOI->AFR[0] &=~(1U<<20); GPIOI->AFR[0] |= (1U<<27);//PI6 AF 14 GPIOI->AFR[0] |= (1U<<26); GPIOI->AFR[0] |= (1U<<25); GPIOI->AFR[0] &=~(1U<<24); GPIOI->AFR[0] |= (1U<<31);//PI7 AF 14 GPIOI->AFR[0] |= (1U<<30); GPIOI->AFR[0] |= (1U<<29); GPIOI->AFR[0] &=~(1U<<28); GPIOI->AFR[1] |= (1U<<7);//PI9 AF 14 GPIOI->AFR[1] |= (1U<<6); GPIOI->AFR[1] |= (1U<<5); GPIOI->AFR[1] &=~(1U<<4); GPIOI->AFR[1] |= (1U<<11);//PI10 AF 14 GPIOI->AFR[1] |= (1U<<10); GPIOI->AFR[1] |= (1U<<9); GPIOI->AFR[1] &=~(1U<<8); GPIOJ->AFR[0] |= (1U<<27);//PJ6 AF 14 GPIOJ->AFR[0] |= (1U<<26); GPIOJ->AFR[0] |= (1U<<25); GPIOJ->AFR[0] &=~(1U<<24); GPIOJ->AFR[1] |= (1U<<7);//PJ9 AF 14 GPIOJ->AFR[1] |= (1U<<6); GPIOJ->AFR[1] |= (1U<<5); GPIOJ->AFR[1] &=~(1U<<4); GPIOJ->AFR[1] |= (1U<<15);//PJ11 AF 14 GPIOJ->AFR[1] |= (1U<<14); GPIOJ->AFR[1] |= (1U<<13); GPIOJ->AFR[1] &=~(1U<<12); GPIOK->AFR[0] |= (1U<<3);//PK0 AF 14 GPIOK->AFR[0] |= (1U<<2); GPIOK->AFR[0] |= (1U<<1); GPIOK->AFR[0] &=~(1U<<0); GPIOK->AFR[0] |= (1U<<7);//PK1 AF 14 GPIOK->AFR[0] |= (1U<<6); GPIOK->AFR[0] |= (1U<<5); GPIOK->AFR[0] &=~(1U<<4); GPIOK->AFR[0] |= (1U<<11);//PK2 AF 14 GPIOK->AFR[0] |= (1U<<10); GPIOK->AFR[0] |= (1U<<9); GPIOK->AFR[0] &=~(1U<<8); } void ltdc_init(void){ //ltdc_gpio_init(); //clock access to LTDC RCC->APB3ENR |= (1U<<3); //RCC->APB3RSTR |= (1U<<3); //RCC->APB3RSTR &=~(1U<<3); //LTDC->GCR |= (1U<<0); //LTDC->GCR &=~(1U<<0); //for(int i = 0; i <(0xFFFFU * 20U); i++){} //for(int i = 0; i <(0xFFFFU * 20U); i++){} //H Synch Timings LTDC->SSCR |= ((HSW - 1) << 16); //test_led(); LTDC->BPCR |= ((HSW + HBP -1) << 16); LTDC->AWCR |= (HSW + HBP + ACTIVE_WIDTH - 1) << 16; LTDC->TWCR |= (HSW + HBP + ACTIVE_WIDTH + HFP -1) << 16; //V sync timing LTDC->SSCR |= (VSW - 1) << 0; LTDC->BPCR |= (VSW + VBP -1) << 0; LTDC->AWCR |= (VSW + VBP + ACTIVE_WIDTH - 1) << 0; LTDC->TWCR |= (VSW + VBP + ACTIVE_WIDTH + VFP -1) << 0; //background color LTDC->BCCR |= 0xFF0000U; //default polarity for hsync vsync dotcolck enable //enable the LTDC Periph LTDC->GCR |= (1U<<0); }
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1 ACCEPTED SOLUTION

Accepted Solutions
Imen.D
ST Employee

Hello @Franksterb92 

I think you encountered the limitation when accessing LTDC registers as described in the STM32H753 Errata sheet 

ImenD_0-1724853223088.png

 

When your question is answered, please close this topic by clicking "Accept as Solution".
Thanks
Imen

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3 REPLIES 3
Imen.D
ST Employee

Hello @Franksterb92 

I think you encountered the limitation when accessing LTDC registers as described in the STM32H753 Errata sheet 

ImenD_0-1724853223088.png

 

When your question is answered, please close this topic by clicking "Accept as Solution".
Thanks
Imen

so would that just be setting the DIVR3EN Bit in the PLLCFGR to 1 to feed the pll3 to the ltdc if so i tried that and it does the same thing 

lol i see it now its in the rcc cr register i added 

 

RCC->CR |= (1U<<28) to enable pll3

while(!(RCC->CR & (1U<<29){} to wait for pll3 ready 

wow i feel dumb now it works for now thank you so much