LL_RCC_GetTIMClockFreq doesn't account for the APB Prescaler - is this correct?

[Phil1]

I'm writing an application which uses a timer (TIM2 in this case) to track communication timeouts. So the timer period changes periodically, it might be an inter-byte gap timeout at one point and an inter-packet timeout the next.

I'm using LL_RCC_GetTIMClockFreq to get the timer frequency, a fixed prescaler, and a quick calculation to work out the timer count value to the timeout I want (or as near as I can get).

The CPU clock is about 66MHz, and I have an APB1 divider active (APB1 = HCLK / 2).

According to RM0316 (STM32F303 Reference Manual) Rev 8, page 133: "9.2.10 Timers (TIMx) clock" -- If the APB1 prescaler is not 1:1, the APB1 timer clock is twice the APB1 peripheral clock.

This means my APB1 timer clock should be 66MHz, but my APB1 Peripheral clock should be 33MHz.

When I run LL_RCC_GetTIMClockFreq() for TIM2, it returns a timer frequency of 33MHz, which doesn't account for the APB1 timer clock being doubled when a prescaler is in effect.

To get the expected timeouts I'm having to do this:

uint32_t TimerFrequency = 0;
 
TimerFrequency = LL_RCC_GetTIMClockFreq(LL_RCC_TIM2_CLKSOURCE);
if (LL_RCC_GetAPB1Prescaler() != LL_RCC_APB1_DIV_1) {
	TimerFrequency *= 2;
}

Is this expected behaviour?

[DRH]

Same situation if timer 1 clock is configured to be clocked by the PLL. The controller I'm using have a fix multiplier by two but LL_RCC_GetTIMClockFreq() provides the clock frequency without considering this multiplier. Can somebody please confirm that?

[waclawek.jan]

Cube is open-source, so you can check easily yourself.

Debug it as your own code.

JW

[DRH]

I'm not familiar with the cube but it seems to be a general library and not a cube issue. It's

 else /* LL_RCC_TIM1_CLKSOURCE_PLL */
    {
      /* PLL clock used as TIM1 clock source */
      tim_frequency = RCC_PLL_GetFreqDomain_SYS();
    }

...so as depicted by Phil, the multiplier 2 is missing.

[waclawek.jan]

Indeed, in both legs of https://github.com/STMicroelectronics/STM32CubeF3/blob/master/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_rcc.c#L826 - reflecting the two settings of RCC_CFGR3.TIM1SW - the multiplication factor (conditional in first leg, unconditional in second) is missing. The same applies for all other timers subsequently.

Moreover, also the comments at RCC_CFGR3.TIMxSW bits in 9.4.13 Clock configuration register 3 (RCC_CFGR3) of RM0316 Rev 8 fails to say that the timer frequency is *twice* the PLL output frequency. (The comment for TIM1SW and TIM8SW for STM32F303xB/C and STM32F358xC could also use some rephrasing).

@Amel NASRI​ , can you please have a look at both the CubeF3/LL and the RM0316 issue?

Thanks,

JW