LCD in 8080 mode with STM32F429 FMC

jens23 · ‎2016-04-16

Posted on April 16, 2016 at 16:40

Hi all,

I have trouble getting a LDC Display on the STM32F429 FMC to work in 8080 Mode. I use the same hardware connection like withe STMF4Discovery Expansion Board and the STM32F4DIS-LCD Modul.

FMC_D0 (PD14) -> LCD_D0

FMC_D1 (PD15) -> LCD_D1

FMC_D2 (PD0) -> LCD_D2

FMC_D3 (PD1) -> LCD_D3

FMC_D4 (PE7) -> LCD_D4

FMC_D5 (PE8) -> LCD_D5

FMC_D6 (PE9) -> LCD_D6

FMC_D7 (PE10) -> LCD_D7

FMC_D8 (PE11) -> LCD_D8

FMC_D9 (PE12) -> LCD_D9

FMC_D10 (PE13) -> LCD_D10

FMC_D11 (PE14) -> LCD_D11

FMC_D12 (PE15) -> LCD_D12

FMC_D13 (PD8) -> LCD_D13

FMC_D14 (PD9) -> LCD_D14

FMC_D15 (PD10) -> LCD_D15

FMC_A0 (PF0) -> LCD_DC

FMC_NOE (PD4) -> LCD_RD

FMC_NWE (PD5) -> LCD_WR

FMC_NE1 (Pd7) -> LCD_CS

The Hardware configuration must be OK because I'm able to read out the correct ID of the SSD2119 Display Cotroller as 0x9919. But I have problems writing command and data to the display.

When I compare the timing with a logic analyzer it seems that with the STM32F429 FMC the A0 address line is changed too late from command (low) to data (high) (see attached figure, marker B) compared to the working STMF4Discovery board which is equipped with a STM32F407 with a FSMC. It also seems the the data is put on the bus with the wrong endianess (please see attached figures).

My FMC configuration:

FMC_NORSRAMInitTypeDef FMC_NORSRAMInitStructure;

FMC_NORSRAMTimingInitTypeDef p;

FMC_NORSRAMStructInit(&FMC_NORSRAMInitStructure);

/*-- FSMC Configuration ------------------------------------------------------*/

/*----------------------- SRAM Bank 1 ----------------------------------------*/

/* FMC_Bank1_NORSRAM1 configuration */

p.FMC_AddressSetupTime = 7;

p.FMC_AddressHoldTime = 7;

p.FMC_DataSetupTime = 15;

p.FMC_BusTurnAroundDuration = 15;

p.FMC_CLKDivision = 15;

p.FMC_DataLatency = 15;

p.FMC_AccessMode = FMC_AccessMode_A;

FMC_NORSRAMInitStructure.FMC_Bank = FMC_Bank1_NORSRAM1;

FMC_NORSRAMInitStructure.FMC_DataAddressMux = FMC_DataAddressMux_Disable;

FMC_NORSRAMInitStructure.FMC_MemoryType = FMC_MemoryType_SRAM;

FMC_NORSRAMInitStructure.FMC_MemoryDataWidth = FMC_NORSRAM_MemoryDataWidth_16b;

FMC_NORSRAMInitStructure.FMC_BurstAccessMode = FMC_BurstAccessMode_Disable;

FMC_NORSRAMInitStructure.FMC_AsynchronousWait = FMC_AsynchronousWait_Disable;

FMC_NORSRAMInitStructure.FMC_WaitSignalPolarity = FMC_WaitSignalPolarity_Low;

FMC_NORSRAMInitStructure.FMC_WrapMode = FMC_WrapMode_Disable;

FMC_NORSRAMInitStructure.FMC_WaitSignalActive = FMC_WaitSignalActive_BeforeWaitState;

FMC_NORSRAMInitStructure.FMC_WriteOperation = FMC_WriteOperation_Enable;

FMC_NORSRAMInitStructure.FMC_WaitSignal = FMC_WaitSignal_Disable;

FMC_NORSRAMInitStructure.FMC_ExtendedMode = FMC_ExtendedMode_Disable;

FMC_NORSRAMInitStructure.FMC_WriteBurst = FMC_WriteBurst_Disable;

FMC_NORSRAMInitStructure.FMC_ContinousClock = FMC_CClock_SyncOnly;

FMC_NORSRAMInitStructure.FMC_ReadWriteTimingStruct = &p;

FMC_NORSRAMInitStructure.FMC_WriteTimingStruct = &p;

FMC_NORSRAMInit(&FMC_NORSRAMInitStructure);

/* Enable FSMC NOR/SRAM Bank1 */

FMC_NORSRAMCmd(FMC_Bank1_NORSRAM1, ENABLE);

Any ideas what could be wrong?

Kind Regards

Jens

#lcd-stm32f429-fmc

jens23 · ‎2016-05-03

Posted on May 03, 2016 at 20:21

Hello all,

my ST FAE solved the problem.

I defined the Command and Data Address like this:

#define LCD_BASE_Addr ((u32)(0x60000000|0x00000000))

#define LCD_BASE_Data ((u32)(0x60000000|0x00000001))

But because we have a 16Bit bus width I have to define the Data-Address with a offset of 2.

#define LCD_BASE_Data ((u32)(0x60000000|0x00000002))

Now it works fine.

Kind regards

Jens