Interrupt speed stm32f7

[con3]

Posted on October 17, 2017 at 17:40The original post was too long to process during our migration. Please click on the attachment to read the original post.

[waclawek.jan]

Posted on October 17, 2017 at 18:19

store their values via DMA to memory in an interrupt.

I don't Cube and won't read the code above, but this is a flawed concept.

DMA is to be used to avoid using software (i.e. interrupt) for moving data around.

JW

[con3]

Posted on October 17, 2017 at 18:38

I just want to use the interrupt to tell the DMA when to act or when it should start moving the data.

The interrupt will be tied to a clock pin( which will be tied to the timer as in the application note), whenever it goes high, the DMA should move the data from the pins to memory.

I'm not sure how else I would effectively be ably to move the data from the pins at 4MHz? In the interrupt I'm just toggling a pin and the max frequency I can do that at is 800 kHz. The DMA's use would be to spare the CPU so that I don't further slow down the interrupt from 800kHz. Is there any other way that I could read data off of two pins at 4 MHz? 

Thank you for the quick reply and input!

[waclawek.jan · Accepted solution]

Posted on October 17, 2017 at 19:00

It's the DMA which should act upon the pin change.

Read that AN you linked to again carefully.

JW

[con3]

Posted on October 17, 2017 at 19:04

Ok I'll reread it, thanks! 

[waclawek.jan]

Posted on October 18, 2017 at 20:18

Q1 - draw a timing diagram with signals (clock, data, anything else), indicating who is the source of which signal.

Generally, DMA is clocked by the system clock (HCLK). It takes several clocks of arbitration after the trigger arrives - this may take longer if other DMA streams are active in the same DMA unit; then it reads from the source - this may take longer if there is contention on the target slave bus on the bus matrix due to other masters accessing the same slave bus, plus if the target is on an APB bus then there's delay due to APB bus running on a different clock; then it writes to the target - the same applies as for source. See AN4031.

Q2 - where is the question?

If you need to read state of 2 pins (which have to be on the same half of the same port if you want to transfer only 8bits) then 6 pins remain, not 2.

You don't need to tie them low or high, you will simply mask the data in software when processing them later.

JW

[con3]

Posted on October 18, 2017 at 19:23

Hi JW,

Thanks for the input thus-far, I have a few more questions, although I have reviewed the document very very thoroughly.

I understand now that the Timer does not trigger an interrupt(and this is a horrible way to do it) but rather triggers a DMA Which fulfills a request.

Question 1:

My main misunderstanding at this point is with the section 1.2.2 on page 13 ( Data and clock alignment considerations).

It states:

'The data and data clock received are synchronous, but not aligned. The data clock being generated by the transmission timer TIMx_CHy configured in PWM mode, while the data is sent only after the dma data transfer has occurred between memory and GPIO. So on reception and depending on the data clock frequency, the data clock edge used to receive data “n� may occur before or after the data changing from data “n� to data “n+1�. Hence reception may want to use either clock “n� or clock “n+1� as trigger to start reception of data “n�. It could also use either rising or falling edge of clock signal. Note that the data on reception side should be stable until the end of reception dma storage from GPIO to memory'

My ADC's will have two data output lines and one line on which the clock signal is supplied on. Whenever the clock signals rising edge occurs, new data will be presented at the pins. It seems that sometimes the DMA might take longer to move the data from the pins than one clock cycle? My main concern is that at every rising edge the data will disappear from the GPIO pins and new data will be presented, so I won't be able to keep the data stable longer than one cycle. How will I ensure that the DMA is done transferring before the new rising edge, as there is no way that the data will stay constant on the line after this rising edge.

https://imgur.com/a/erUVx

(picture of table attached)?

Question 2:

My approach will also be very similar to the example given in the application note for the STM32L476G (page 18), where they state:

'On the STM32L476G-Discovery board, only GPIO PE[15:10] can be used for the data transfer, since other GPIO PE bits or other GPIO buses are already used or not accessible. PA[5] is used for the data clock transmission. It is only possible to read/write on GPIO either on 16 bits or on 8 bits. In this case write (transmit) and read (receive) shall be done on 8 bits. It means that write/read will be done on GPIO PE[15:8] but GPIO PE[9:8] are not accessible on the Discovery board. So only 6 bits in parallel can be transmitted. The non-transmitted bits are set to 0 when computing the CRC at transmission side and the same is done on the reception side.'

Pretty similar to the example, I'll need to read only 2 bits at a time, but the minimum possible will be 1 byte, so I'll tie the other two GPIO's to ground and let the DMA read their values aswell to be able to perform the transfer, therefore if data needs to be discarded it's wouldn't be a problem if these are discarded, but the other two bits are vital.

Thank you for all the help. After these questions, I feel like I'll have a good understanding of how to approach this and I'm very glad they were able to do parallel transmissions up to 10 MHz using this method, this will completely solve my problem!

[con3]

Posted on October 19, 2017 at 16:45

Sorry JW,

The lack of sleep must have caught up to me on Q2. my actual question was that I am unsure what they meant by discarded data? are these bits that aren't read and why not? Then If possible if these bits aren't read how can I ensure that the 2 bits from the ADC are always read(if bits need to be discarded, the other 6 can be). 

Thank you for all the help.I really appreciate it! After I understand this I'll close the question.