2015-04-01 04:39 AM
Hi all,
We are trying to interface a 4M SRAM (IS62WV25616ALL) to STM32F407IGT6 through GPIO Pins of the controller. We are able to write data sucessfully into the SRAM but we are facing difficulty in READING the same data from the same memory location. We are not able to figure out where the problem lies (either with the Timing of the SRAM which operates at 70ns or the timing of the GPIO pins of the controller (it operates at 5ns/pin)).... kindly let us know if you have any idea. Thanks in advance>>>. - Karthik #interface-stm32-to-sram-using-gp2015-04-01 06:01 AM
Are people expected to guess the exact wiring and coding your attempting to use, or would it be helpful to provide that?
2015-04-02 04:49 AM
hi Clive,
GPIO Ports being used are :
1)
Address Lines[0:15] : GPIO Port F and GPIO Port G.
2)
Data Lines[0:15] : GPIO Port D and GPIO Port E.
3)
Write Enable(WE)
: GPIO Port D pin 5.
4)
Chip select(CS1)
: GPIO Port G pin
5)
Output Enable(OE)
: GPIO Port D pin 4.
6)
Lower Byte(LB)
: GPIO Port E pin 0.
7)
Higher Byte(UB)
: GPIO Port E pin 1.
FSMC (flexible static memory contoller) feature is completly disabled and the and we are trying to use only gpio pins as address lines, data lines, and control lines. The write and read cycles i ve attached with this....We follow that read and write cycles after configuring the gpio pins as address and data lines... duringWrite
Data pins are configured as OUTduring
Read
Data pins are configured as IN.... ________________ Attachments : READ.jpg : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006Hzz5&d=%2Fa%2F0X0000000bRj%2Fi4ODxeWGfAJgimla0vskqdVwS6q8cgImBqpG0V24Kzc&asPdf=falseWRITE.jpg : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006Hzyv&d=%2Fa%2F0X0000000bRi%2FEZX9dlXJBB0P970IXU0LjghBuvPC5ppI.FAG2OzYyIo&asPdf=false