Input Capture module in pulse count example

[rumlyen]

Posted on January 16, 2016 at 07:49

Hello all,

In an external pulse count application, is it possible to capture Timer counts at fixed interval using input capture (IC) module while external input (TIM5_CH1) is driving timer time-base (through TI1F_ED).

I've also tried just storing TIM5->CNT at every RTC interrupt, but found some irregular counts. May be this irregularity is for other interrupts (of high priority) with LP Sleep implementations.

I request some advice on how to configure this capture module (if possible on STML151, clock tree attached). I've configured TIM_5 like this:

......... .........   /* Reset the CC1E Bit to configure CC1S bit of CCMR1 Reg */   TIM5->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC1E);   tmpccmr1 = TIM5->CCMR1;   tmpccer = TIM5->CCER;     /* TIM5 Input CH1 is selected to be connected to IC1. and reset the filter */   tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC1S)) & ((uint16_t)~((uint16_t)TIM_CCMR1_IC1F)));   tmpccmr1 |= (uint16_t)(TIM_ICSelection_DirectTI | (uint16_t)(0x00 << (uint16_t)4));     /* IC Rising edge and set the CC1E Bit */   tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC1P | TIM_CCER_CC1NP));

  /* Write to TIM5 CCMR1 and CCER registers */

  TIM5->CCMR1 = tmpccmr1;   TIM5->CCER = tmpccer;     //Input Trigger source TIM_TS_TI1F_ED: TI1 Edge Detector.   TIM_SelectInputTrigger(TIM5, TIM_TS_TI1F_ED);     //Slave Mode TIM_SlaveMode_External1: SMS=111   TIM_SelectSlaveMode(TIM5, TIM_SlaveMode_External1);     /* TIM5 enable counter */   TIM_Cmd(TIM5, ENABLE);

[Tesla DeLorean]

Posted on January 16, 2016 at 15:23

You mention ''irregularity'' but neither define the numbers you are seeing, or the frequency of the signal, or expectations.

If you had a 1 Hz pulse you could apply that to CH2 and have it latch CNT into CCR2 You could use another timer, triggering a DMA1 read of CNT, the latency/jitter in that sample point would be smaller than an interrupt.

[rumlyen]

Posted on January 16, 2016 at 17:58

Thank you for your kind response.

I've a fixed custom PCB to work with (~MHz input source for Tim5_CH1). I afraid I can't add any external module/input right now. I guess, internal trigger or another timer can't be applied/routed to TI2.

From L151 datasheet, DMA requests can be generated from Tim2-7 peripherals only. As internal clock changes in Run/LP sleep mode, I'm trying to avoid Timer internal clock to initiate DMA transfer. Here, only Tim9-11 has (LSE) independent clock source.

Could you please suggest me an alternative (if any) for this peripheral-memory DMA configuration.

Thank you for your time.

[waclawek.jan]

Posted on January 16, 2016 at 23:38

> I've a fixed custom PCB to work with (~MHz input source for Tim5_CH1). I afraid I can't add any external module/input right now. I guess, internal trigger or another timer can't be applied/routed to TI2.

You have a more substantial problem. The timers' inputs are synchronized, so you have to have a high-speed APB clock running to be able to run the timer from an external clock. See fEXT specification in the Timer characteristics section of datasheet. JW

[rumlyen]

Posted on January 17, 2016 at 04:12

Thank you JW,

I've founnd, f_EXT is 0 ~ f_TIMxCLK/2.

I have a confusion, is it necessary to have fixed processor clock (or APB1 clock) for accurate external pulse count ? If LP_sleep/Run mode toggles, APB1 or TIMxCLK would change.

I've configured for External clock source mode 1 and reference timing diagram is attached for your kind comment.

Thank you ________________ Attachments : External_clock_source_mode_1_Stm32l151.PNG : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I16X&d=%2Fa%2F0X0000000bic%2F601vhwYWE4CX8yHyqCC0rs7Z1mbbP1v.kxabdBkD.jo&asPdf=false