[??] IAR 5.20 and pre silicon rev Y

adriano2 · ‎2008-12-10

Posted on December 10, 2008 at 10:26

adriano2 · ‎2011-05-17

Posted on May 17, 2011 at 12:55

We tried to reduce the JTAG speed, it works fine at 5kHz. But this speed is too low for any real debugging.

However, we downgraded to Segger to v3.90 without success.

thanks

jj · ‎2011-05-17

Posted on May 17, 2011 at 12:55

As stated - we've recently worked with > 10 clients using IAR5.20, yellow, Ver 6.0 JLink, and ST's ''E'' Eval board. (this is also what we use)

Any chance you've modified JTAG signals via Alternate Functions/Remap? Wise to check/really confirm.

Have you extended JLinks ribbon, connection cable or have you made modifications to the Eval board? (which may effect frequency response)

Lastly - we've switched to SWD (saves pins) & seems to give roughly the same performance as JTAG. Should you have signal trouble in the JTAG path switching to SWD may ''cure'' (at best) or help to identify (at least).

Plz try & report...