I2C interrupt handler with STM32F2xx Standard Peripheral Library

[fpeelo]

Posted on January 15, 2014 at 17:26

Hi

I am writing an I2C interrupt handler for the STM32F207 and am using the Standard Peripheral Library. The problem I currently have is how to set up a NAK when receiving 1 byte from an I2C slave. According to the reference manual, RM0033, ''In case a single byte has to be received, the Acknowledge disable is made during EV6 (before ADDR flag is cleared) and the STOP condition generation is made after EV6'' (section 23.3.3, p585, ''Master receiver''). But the standard peripheral library documentation describes using I2C_CheckEvent(), I2C_GetLastEvent() or I2C_GetFlagStatus() (UM1061, p313, ''I2C State Monitoring Functions''), which, unless I've got something wrong, will all clear the ADDR flag before you even get to see what the event was. They read SR1 and SR2, and RM0033 says ''This bit is cleared by software reading SR1 register followed reading SR2'' (I assume there was supposed to be a ''by'' after ''followed''). Is the standard peripheral library not supposed to be used in an interrupt handler? Or is GetLastEvent() not the right way to determine the cause of I2C2_EV_IRQHandler() being called? #i2c-stm32-interrupts

[dmg0048]

Posted on January 16, 2014 at 00:12

Check the I2C_ITConfig, I2C_GetITStatus functions, also this file might serve as reference:

https://my.st.com/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Attachments/20502/i2c_int.c

[fpeelo]

Posted on February 04, 2014 at 17:27

Thanks for that. Using the functions you suggest, I was able to write 2 bytes, generate a restart and read 64 bytes from an I2C eprom.

But it didn't quite work as I expected. In the end, I had to avoid all the EV7_x events in the BTF handler, and do all the generating NACK and STOP from the RXNE handler instead. I'm using an STM32F2xx chip, and the reference manual RM0033. From the comments in your code, I think you might be using an STM32F1xx and RM0008, would this be true? The descriptions of Master Receiver in RM0008 and RM0033 are slightly different, and I didn't manage to get either of them to work properly. In the end, I generate the NACK in the 3rd-last RXNE event, and the STOP in the 2nd-last RXNE. RM0033 and RM0008 both say to do both in the 2nd-last event. I did not succeed in getting the NACK to come out of the chip when I put the I2C_AcknowledgeConfig() in the BTF handler. Also, in event 8_2, for some reason I got the BTF event twice when sending the 2-byte subaddress. I see you set a flag in this situation, rather than incrementing a state variable, is this because you also got this happening twice? Reading the DR register cleared the BTF. Frank