2025-09-11 7:39 AM - last edited on 2025-09-11 7:51 AM by mƎALLEm
Hello,
I have a board with an STM32C092KCU6 where the main clock is using the HSI48 internal oscillator but I also have an 8MHz crystal for the HSE oscillator to use for FDCAN for higher precision. When the HSE is clocking just the FDCAN module the CAN does not work.
I can get the CAN to work by using HSI48 as the FDCAN clock source. I can also get the CAN to work if I use HSE as the main clock (but it is too slow) or if I enable the clock output MCO2 with HSE as its source or also if I enable the RTC module and set HSE as its source.
So it seems that the HSE oscillator will only work if it is being used on FDCAN + one other place.
Osc for core
|
CAN clk
|
RTC clk
|
MCO2
|
CAN working?
|
HSI48
|
HSE
|
-
|
-
|
No
|
HSE
|
HSE
|
-
|
-
|
Yes
|
HSI48
|
INT
|
-
|
-
|
Yes |
HSI48
|
HSE
|
HSE
|
-
|
Yes |
HSI48
|
HSE
|
-
|
HSE
|
Yes |
HSI48
|
HSE
|
-
|
HSI48
|
No
|
I first thought this was a gain margin or a drive problem but I calculated that Gm is 7.57 for the crystal I have used. Also, my colleague has tried this on a C092 Nucleo board and says he can see the same thing.
Any clues as to what the problem might be would be appreciated.
Many thanks.
2025-09-11 7:50 AM - edited 2025-09-11 7:53 AM
Hello @Neiliow ,
First, with CAN/CAN-FD it's not recommended to use any of the internal clock source HSI/HSI48 etc .. You should use an external precise clock source with HSE: crystal or crystal oscillator.
Second, please refer to this article as you could be in the same situation as what is described in this article: FAQ: Fixing STM32 FDCAN communication disruptions - APB bus, kernel, and time quanta clocks
The FDCAN requires that the CAN time quanta clock is always below the APB clock:
fdcan_tq_ck < fdcan_pclk
2025-09-11 8:52 AM
Hello mƎALLEm,
Thank you for your reply and for the link to that article. I need to read it in more detail, however -
1. I was just using HSI48 clock to test the CAN. In my design I want to use HSE as the FDCAN clock and that is what is not working.
2. I think my clock configuration shown below meets the requirements since my APB clock is 48MHz and the FDCAN clock is 8MHz.
Kind regards,
Neil
2025-09-11 9:14 AM - edited 2025-09-11 9:30 AM
First, start by using one of the loopback modes. Do you face the same issue with that config? this is important to know from which way to go..
Second, what is the sample point set and what is the mode used: classical/CAN-FD? what are the BS1, BS2 values?
Third, you didn't tell what do you mean by "is not working"! wrong frames? communication doesn't start at all? other?