How VDDA, VDD, Vref+ effects ADC value?

[XZhen.2]

Hi guys.

I am using STM32F401VEH6 to read the peak value of a waveform like sinewave.

but the value drifts about 40LSB time to time.

I connected VDDA to Vref+ and seperated from VDD.(based on Application Note recomandation)

But when I checked the datasheet, it says VDDA&VDD must use the same power source.

So which is correct? the datasheet or the Application Note? Does it effects the ADC result when using different power source ?

[Peter BENSCH]

Well, in case of doubt, the data sheet is always decisive. When you mention an application note, it's also helpful to include its number so people know what you're referring to. Measurement errors can have a wide variety of causes, which AN2834 covers in detail. 

If you have connected VREF+ with VDDA, you measure ratiometrically, i.e. relative to the supply voltage VDDA. For an absolute value measurement of a voltage at a GPIO, which must not exceed VDDA, you must therefore always perform a second comparison measurement at an external reference voltage. Then you can calculate the absolute value of the actual, first voltage.

Hope that helps?

Regards

/Peter

[XZhen.2]

thanks for your answer.

Measurement errors can have a wide variety of causes, which AN2834 covers in detail. 

→AN2834 Fig 20 provide 2 different connections.​and I used the right one。VDD = 3.3V, VDDA = Vref+ = 1.8V, VSS=VSSA​

And I am using UFBGA package, can't re-work to verify the influence on ADC when these 2 connections.​

​Guess I have to change my pcb design to figure it out.