cancel
Showing results for 
Search instead for 
Did you mean: 

How to make use of Vbus Sensing for USB device?

sn1
Associate

We are using USB_OTG_FS in Device mode in STM32U575 series. In our application, we enable the USB peripheral on external GPIO pin rising event & disable the USB peripheral on external GPIO pin falling event. 

Need to know how to make use of Vbus Sensing to detect USB connected or not? Any examples available?

 

 

2 REPLIES 2
Tejal Gadad
Associate II

I am still a rookie in this field but since I was recently working on the VBUS sensing for STM32F446 I can give you my insights on what I have gained so far.

Refer to the "AN4879 - Introduction to USB hardware and PCB guidelines using STM32 MCUs" documentation by STMicroelectronics. 
https://www.st.com/resource/en/application_note/an4879-introduction-to-usb-hardware-and-pcb-guidelines-using-stm32-mcus-stmicroelectronics.pdf#page=4&zoom=100,0,370 

When the device detects the host presence the USB device must pull up the D+ signal line (for USB_OTG_FS I believe) with a pull up resistor, which allows the host to detect the presence of the USB device. 
If the USB device is BUS powered then there is no need of VBUS sensing as the USB host and device will be connected every time the USB device is powered. But when the USB device is self powered  i.e. by an external battery source then VBUS sensing is mandatory. 
Pin PA9 on STM32 is dedicated to VBUS sensing even though it is not mandatory to use this pin, most of the libraries assume PA9 to be responsible for VBUS sensing. According to my understanding this pin allows the USB device to enable the USB transceiver when it detects a logic 1. This I believe is done by the firmware side of STM32. You must note PA9 can handle maximum voltage of VDD+4V thus you may use a voltage divider circuit to make sure the voltage is within the maximum ratings.

To implement this circuit you can use a transistor whose base is connected to VBUS, collector & emitter are connected to 3V3 & D+ via a pull up resistor respectively. You can implement a voltage divider circuit and connect VBUS to PA9. This way when the USB host is connected to USB device and there is voltage on VBUS pin of the USB connector the D+ line is pulled up via a pull-up resistor usually of 1.5 kohms. The PA9 pin detects a logic 1 due to the VBUS pin which does not exceed its maximum ratings due to the voltage divider circuit (you can calculate voltage divider resistors values or check the documentation). 

I personally referred the STM32 Nucleo Board's schematic while designing my board you may refer it as well. 
I hope I was able to convey some information if any point is incorrect please correct me and give me your valuable suggestions. 

 

> To implement this circuit you can use a transistor whose base is connected to VBUS, collector & emitter are connected to 3V3 & D+ via a pull up resistor respectively.

Only 'F1 and 'F3 (and maybe 'L1, I'm not sure) don't have the D+ pullup internally. On other families, you should NOT put external pullup as it would be in parallel with the internal pullup.

JW