cancel
Showing results for 
Search instead for 
Did you mean: 

how to get 50 % duty cycle with complementry pulse

Ranjeet Singh
Senior

i want to generate 50 % duty cycle at freuency (100khz-200 KHz), but i am not getting 50% , i am getting 33-34% duty cycle.this duty cycle change when the frequency change.0693W00000aJBYaQAO.jpg0693W00000aJBZsQAO.png0693W00000aJBZTQA4.png0693W00000aJBMOQA4.png

14 REPLIES 14

Show the functions initializing the timer.

Is the frequency as expected?

ARR = N - 1

CCR1 = N / 2

F​rom the scope screen it's hard to see the cycles, or if they are complementary.

Show all registers in TIM1

Tips, Buy me a coffee, or three.. PayPal Venmo
Up vote any posts that you find helpful, it shows what's working..
Ranjeet Singh
Senior

YES ,Frequency is same as expected

Ranjeet Singh
Senior

0693W00000aJBoOQAW.png0693W00000aJBnfQAG.png

Ranjeet Singh
Senior

ARR = N - 1

CCR1 = N / 2

for this parameter

ARR = 150-1

CCR1 = 150/ 2

Ranjeet Singh
Senior

0693W00000aJBoxQAG.jpg0693W00000aJBp7QAG.jpg

Ranjeet Singh
Senior

i am using the stm32 g0b1re Microcontroller Board

Ranjeet Singh
Senior

if i will use the same parametere at 1KHz frequency then i will got the 50% duty cycle.

time clock -64Mhz

prescale-64-1.

so i will get frequency 64/64= 1 Mhz.

and using ARR value = 100

frequency =1M/100= 10 KHz

CRR=50

duty cycle= (50*100)/100= 50 % duty

but when

prescale-1.

and using ARR value = 100

frequency = 317KHz

CRR=50

duty cycle= 25 % duty

using crr =50 and arr 100 why not duty cycle become 50n%?

Ranjeet Singh
Senior

what i m doing wrong ?

AScha.3
Chief

not wrong, but maybe there is some deadtime active.

timer -> complementary outputs = usually need deadtime .

try setting it very short.

+ set timerclk 64M , no prescaler.

for 10khz out -> arr 6400 , 300khz out -> 210 .

If you feel a post has answered your question, please click "Accept as Solution".