As others have pointed out, it takes more than just 1..2 timers to do what you want. A DDS (Direct Digital Synthesis) method can be used. Suppose your target freq. is f=100001 Hz output as a 0/1 signal. If you would sample that signal with a sample rate of say 1 MHz, you get one million samples for every second. The sample sequence might start with 0 0 0 0 0 0 0 0 0 0 1 1 .... The length of the 0 resp. 1 runs will be most often 10 and rarely 9 (the jitter) because 100001 is slightly higher than 100000.
The DDS idea is to pre-calculate a sampling sequence for a given frequency and to output that sequence with a constant synthesizer frequency, 1 MHz in the example.
Output can be done using Timer-driven DMA. If the output is really 0 / 1, the DMA destination would be a GPIO port. One could also use a DAC to generate some (pseudo-)analog waveform (Wavetable Synthesis). The DMA is clocked by a timer to generate the output at the synthesizer clock rate.
The next issue is memory. Storing a full second of samples (which is required to achieve the 1Hz precision) costs a lot of memory and is not feasible in a small MCU.
The remedy is using circular or double-buffer DMA using smaller buffers and to pre-calculate the next batch of samples on-the-fly in an interrupt handler. The whole thing is a trade-off between memory space and interrupt frequency. If the MCU can reliably handle one interrupt per sample you dont even need DMA buffers at all, only a counter.
For audio frequencies, there is an impressive demo: https://www.youtube.com/watch?v=4JkhzH57Je4
