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help!A problem among BSRR,BSRRL and BSRRH

hao741100265
Associate II
Posted on October 13, 2012 at 20:22

when I build my project,an error ''User\main.c(12): error:  &sharp136: struct ''<unnamed>'' has no field ''BSRR''   '' was appeared .

k

yes,I check the '' STM32F2xx_StdPeriph_Lib_V1.1.0 '' of STM32F2XX , it doesn't exits the BSRR but BSRRL and BSRRH.as follows:

//in the  stm32f2xx.h

typedef struct

{

  __IO uint32_t MODER;    /*!< GPIO port mode register,               Address offset: 0x00      */

  __IO uint32_t OTYPER;   /*!< GPIO port output type register,        Address offset: 0x04      */

  __IO uint32_t OSPEEDR;  /*!< GPIO port output speed register,       Address offset: 0x08      */

  __IO uint32_t PUPDR;    /*!< GPIO port pull-up/pull-down register,  Address offset: 0x0C      */

  __IO uint32_t IDR;      /*!< GPIO port input data register,         Address offset: 0x10      */

  __IO uint32_t ODR;      /*!< GPIO port output data register,        Address offset: 0x14      */

  __IO uint16_t BSRRL;    /*!< GPIO port bit set/reset low register,  Address offset: 0x18      */

  __IO uint16_t BSRRH;    /*!< GPIO port bit set/reset high register, Address offset: 0x1A      */

  __IO uint32_t LCKR;     /*!< GPIO port configuration lock register, Address offset: 0x1C      */

  __IO uint32_t AFR[2];   /*!< GPIO alternate function registers,     Address offset: 0x24-0x28 */

} GPIO_TypeDef;

But all the Manual Reference incluces the latest  mention the  GPIOx_BSRR and tell the user how to use it . 

No any document indicate the BSRRH and BSRRL .

And now,for the mismatch between the latest Manual Reference(RM0033) and its STM32F2xx_StdPeriph_Lib , I don't know how to solve it?

who tells me?

thanks.

                                                                                              ---------David

                                                                                             

mailto:---------hao741100265@gmail.com

#help-bsrr-bsrrl-bsrrh
4 REPLIES 4
hao741100265
Associate II
Posted on October 13, 2012 at 21:39

OH,GOD,I have found the solution by myself.

I try to analyze the Address offset .

I found that:

             BSRRL:   Address offset :0X18

             BSRRH : Address offset :0X1A

             BSRR:     Address offset :0X18

GPIOx_LCKR:    Address offset :0X1C

So,I guess that BSRRL and  BSRRH are the 16-bit Register and through my text,I found my guess is true.

Oh,yeah~~~
Posted on October 14, 2012 at 02:35

You could also cast it to 32-bit and set/reset multiple bits atomically.

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hao741100265
Associate II
Posted on October 14, 2012 at 07:14

could you tell me in detail?thank you

Posted on October 14, 2012 at 13:00

*((__IO uint32_t *)&GPIOx->BSRRL) = 0x10002000;

[DEAD LINK /public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/STM32F4 Bit Set Reset Register&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD06506F5B&currentviews=200]https://my.st.com/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=%2Fpublic%2FSTe2ecommunities%2Fmcu%2FLists%2Fcortex_mx_stm32%2FSTM32F4%20Bit%20Set%20Reset%20Register&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD06506F5B¤tviews=200

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