Hello, I am Working with STM32H7 and I want to put in my board 2 QSPI as you put in your evaluation board stm32h745i-disco. Could you say me waht is the Interface signals layout guidelines?, by the example as router clk signal (star or daisy chain).

[FAlca.2]

Hello,

I am Working with STM32H7 and I want to put in my board 2 QSPI as you put in your evaluation board stm32h745i-disco.

Could you say me waht is the Interface signals layout guidelines?, by the example as router clk signal (star or daisy chain).

Thank

[Tesla DeLorean · Accepted solution]

Presumably the two parts will be mounted closely?

For the common CLK / NCS I'd avoid circuitous routing, just bring up a via so both top level traces are equidistance, or daisy chain one to the next as short as possible.

Try to keep the 8 data traces the same length, a 27 or 33 R series will help stop the lines ringing.

Using SOIC16W parts?

Micron has a dual die part (1Gb) allowing for both banks on one part. ST sometimes using 1x 1Gb or 2x 512Mb parts.

[FAlca.2]

Thank for your answer,

We are thinking to use 2x1Gb of Microm (ref. MT25QL01GBBB8E12-0SIT). This is a TBGA24. it is not SOIC.

Do you think we will have problem?