HAL_SPI_Receive() issues, more than 1-byte SCLK

[YChen.41]

Dear all,

I have been trying to read ADC value from an ADC chip (TI ADC161S626) through SPI receive only master (The STM32 used were STM32F103C8T6). However, I realised when I request to read one byte with HAL_SPI_Receive() function, there are more than 8 SCLK oscillation as shown in the figure below. Furthermore, the CPOL was set high, hence, the reason of initial low (before SPI start) is also unknown

The code including the variables responsible for the communication are shown below:

uint8_t tempADCdata[1];

HAL_GPIO_WritePin(GPIOA, ADC_CS_Pin, GPIO_PIN_RESET); // select ADC

HAL_SPI_Receive(&hspi1, tempADCdata, 1, 1);

 HAL_GPIO_WritePin(GPIOA, ADC_CS_Pin, GPIO_PIN_SET); // disable Slave Select

Would you be able to suggest where the issue might be? Thanks!

Best Regards

Danny Chen

[S.Ma]

Test by trying to use bi directional mode. In monodirectional mode, some configuration makes SCK clock unstoppable (SW needs to keep up)

If you don't need MOSI, just don't init any GPIO with it, it will go nowhere...

[waclawek.jan]

> SPI receive only master

This is exactly what . talks about - as soon as you enable SPI it starts clocking and won't stop until you disable it. HAL/Cube does not much else.

As . said, use normal bidirectional SPI, with MOSI not set in the GPIO matrix.

JW

[YChen.41]

Thanks for the suggestion, I have changed it to bidirectional SPI, however there's another issue, the goal is to receive 3 bytes, but when I use bidirectional SPI each received bytes were far apart, this would significantly slow down the sampling rate.

The code used were:

uint8_t tempADCdata[3];

 HAL_GPIO_WritePin(GPIOA, ADC_CS_Pin, GPIO_PIN_RESET); // select ADC

 HAL_SPI_Receive(&hspi1, tempADCdata, 3, 1);

 HAL_GPIO_WritePin(GPIOA, ADC_CS_Pin, GPIO_PIN_SET); // disable Slave Select

The figure below shows the separation of SCLK between bytes

You could see that between bytes is around 4-5 us, 3 bytes took about 12.5 us, the sampling rate is then hindered at 80KSPS, where ADC161S626 has the capability to go up to 250KSPS.

Is there anyway that you could prevent this interbyte delays?

Thanks

Danny