2010-10-05 12:39 AM
what is the full speed system clock i can
achieve with stm32-discovery?
and how? now i work with 8Mhz cristal.2010-10-05 07:35 AM
It is documented to be 24 MHz, you need to configure the PLL, and you can use the AHB/APB1/APB2 with no scaling (ie at 24 MHz). The flash will also run at this speed without wait states.
The PLL would be set to (HSE / 2) * 6 If you are using the standard library you can select the speed in system_stm32f10x.c by changing a #define, or program it yourself, either way review the code in the ST firmware library (at the address printed on the board) to see how to configure the clocks.2010-10-05 11:10 PM
thanks for the replay .
i used this configuration: RCC->APB2ENR |=0x14; RCC->CR = (uint32_t)0x00000000; RCC->CFGR=0x4000005; RCC->CR=0x1090000; but still i cant get any higher then 8Mhz. why?2010-10-06 01:18 AM
As far as I can see from your magic numbers you don't select the PLL as system clock. You can try something like this (it seems to work but I don't know if it's the correct way to do it)
//// Configure system clock PLL*3 driven by external high speed //// oscillator (8 MHz crystall) 24MHz // Turn on high speed external oscillator RCC->CR |= RCC_CR_HSEON; // Wait until it's ready while ((RCC->CR & RCC_CR_HSERDY) == 0) ; // Select PREDIV1 as PLL source and sett PLL mul to 3 (set bit 0) // for 8*3 = 24 MHz RCC->CFGR |= RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL_0; // Start PLL RCC->CR |= RCC_CR_PLLON; // Wait until it's ready while ((RCC->CR & RCC_CR_PLLRDY) == 0) ; // Select PLL as system clock RCC->CFGR |= RCC_CFGR_SW_PLL; // Here we can check if PLL is used, and maybe disable HSI // Disable HSI RCC->CR &= ~RCC_CR_HSION; (Is there some kind of code tags one can use?)2010-10-06 01:30 AM