2011-11-17 06:38 AM
When try to access to SRAM through FSMC (SRAM example from IAR 6.1) I don't see any address on ADDRESS 7:0. Only high frequancy (> 10 MHz) peaks and splashes. With ADDRESSes 20:8 all OK. With DATA BUS all OK. Read an Write mode - result is all the same. When disable and enable SRAM result is all the same. Mix mode is disabled. Bus F ( Low addresses in STM32F207 ) is setted properly. Where is the problem? ( When I try to set bus F as usual GPIO and toggle pins- all works OK). Only when FSMC . What is the matter ? Please help !
#fsmc-sram2011-11-17 08:26 AM
Mix mode is disabled. Bus F ( Low addresses in STM32F207 ) is setted properly.
It might be safer to assume that it is not, in fact, set up correctly and provide the applicable code for others to look at, rather than try to get everyone to guess. There are plenty of ways of getting it wrong. Have you for example enabled the GPIOF clocks? Did you enable them before configuring the unit? etc.2011-11-17 09:56 PM