Showing results for 
Search instead for 
Did you mean: 

For the single-port DMA, please document better EN-related behaviour

In the single-port DMA, CCR.EN when set, it locks most of the registers, including all other fields of the CCR register itself.

Moreover, EN is not autocleared when single-transfer is complete. This is not documented clearly anywhere.

These two things in combination result in surprise especially those (as me 🙂 ) who are accustomed to the dual-port DMA (which autoclears EN).

This is sort of documented in the narrative as

If the channel is configured in non-circular mode, no DMA request is served after the last

transfer (that is once the number of data items to be transferred has reached zero). In order

to reload a new number of data items to be transferred into the DMA_CNDTRx register, the

DMA channel must be disabled.

but this is not that very clear, especially it lacks a direct reference to CCR.EN.

Also, EN is cleared by hardware and can't be reenabled when the respective TEIF is set.

Besides these issues, the fact that registers are locked while EN=1 ought to be documented in the registers' description. This *is* documented in e.g. RM0351, but not in RM0091 (rev.9) nor RM0008. I did not check other RMs.

ST, please add clear description of all these items both in the narrative, and in the in registers' description, into *every* RM for STM32 models containing the single-port DMA (i.e. F0, F1, F3, G0, L0, L1, L4).

This should also go into AN2548, which ought to be expanded adding usage examples for all the relevant modes (not the "libraries" based nonsense, but clear description and perhaps also clear code).