For ADC input, my input signal is sinusoidal with no DC, that is, it has positive and negative value. Is it possible to convert a negative value without problem?

[JKim.81]

In the document, the input level is limited by Vref+ and Vref-. But Vref- seems to be tied to GND in general, which implies a negative value cannot be converted without problem.

Can Vref- be connected external -5V or -3.3 V for handling a negative value?

If not, do I have to add an offset to the input signal before ADC to guarantee the input within 0 to Vref+.

Please let me know.

[waclawek.jan]

https://community.st.com/s/question/0D53W00001BxpkFSAR/as-for-my-recent-post-my-mcu-is-stm32f031k6

> Can Vref- be connected external -5V or -3.3 V for handling a negative value?

No.

> If not, do I have to add an offset to the input signal before ADC to guarantee the input within 0 to Vref+.

Yes.

An appropriate resistive divider, with one end at your input signal, the other at VREF+ (or VDDA) might suffice. You have to take into account resulting impedances and their impact on sampling time; if this will result in inacceptable impedance you would need to perform the shift "actively" e.g. using an opamp.

JW

[JKim.81]

Do you mean that I have to use an OP-AMP Circuit as shown below?

Please let me know.

[waclawek.jan]

Yes, except in the first schematics the divider should IMO go to positive VREF.

JW

[JKim.81]

Thank you very much.

[S.Ma]

Alternatively, depending on the signal properties, an AC coupling with serial cap followed by mid voltage could be an option.

[GLASS]

For better quality, consider using an OPAMP. It will allow you to ​add Vref/2 offset (mandatory), make low pass filter (to avoid aliasing) and drive with low impedance the ADC input. Otherwise, as stated by Jan, it will be difficult to keep a short sampling time vs relative low impedance of mux/sample and hold of STM.