2013-03-26 04:02 AM
Dear all,
I have de
veloped a board on which
a STM32F205 microcontroller is connecte
d to an a
synchronous
external SRAM (ISSI IS61WV102416BLL) which has
read/write access times of 10ns.
This
RAM is used as a
pic
ture buffer.
I configured the F
SMC bus as follows:
Normal mode (mode 1)
ADDSET = 2
HCLK cycles
DATAST = 2
HCLK cycles
where HCLK is 120MHz.
I measuredthe NE and NWE lines
for one write ac
cess and saw that
ADD
SET
last
s
1.62us and the memory transaction, 8.52us. Considering the memory
read/write access time of 10
ns and the
FSMC configuration
, I expected something more like 16ns for ADDSET an
d 32ns for the memory transaction which is more that 200x
faster that
wha
t I have today
. Am I missing something or where should I focus on to improve this poor memory performance? Thank youin advance for your help.
Regards
#stm32f205-sram-fsmc-performance2013-03-26 07:42 AM
That does seem awfully slow.
Perhaps you need to revisit your assumptions, and confirm the speed the core is running via MCO pins, or timer output. Check the performance observed with one of the EVAL series boards using external memory.2013-03-27 01:09 AM
T
hank
you clive1 for your answer.
As you suggested
,
I did some tests with the SRAM
of
STM3220G-EVAL board in order tobe sure that m
y code
was
working as expected
and themeasured write access time was near 40ns, which
is correct.
I found what w
as wrong
:
In my IDE (Crossworks), for w
hatever reas
on, the
configuration hea
der ''stm32f2xx.h'' used within the project was
another
one that t
he one specified in the project structure w
hich
defined
the
HSE value to 25MHz instead of 16MHz. Iupdated the project struc
ture and now
, the
write access time of the SRAM is near 4
0ns.
2013-03-27 02:23 AM
I believe changing the
''stm32f2xx.h''
header is generally not a good idea. Using Crossworks too, I usually add the define for the HSE_VALUE to the project settings, and not directly into the header. The same applies for USE_STDPERIPH_DRIVER. This is IMHO the way intended by ST.