2015-11-27 12:07 PM
Beyond frustrated and ready to drop ST (for my whole company's sake) I ask, is there a working example using external flash memory polling with the HAL drivers?
Of course I have a working example with the STD libraries yet they are not supported....2015-11-27 01:27 PM
What specific PART are you using?
Not much for the HAL here, but perhaps you can show what you're trying and we can try and rationalize why that isn't working. The main issues tend to be if things are actually erased properly, and any pending error status is cleared. The classic problem with F2/F4 parts is picking the right sector to be erasing as the blocks are non-uniform in the first 128KB2015-12-09 04:48 AM
The STM32F03080-discovery board.
I have copied over a very small part of the code. Previously I have success fully read the ID number of the part. Erased the part. Written to the part. Then a read from the part of the data just stored appears the HAL_SPI_Receive() puts data offset in array pointed to. when this is executed the signals are all 00 yet I get 0xFF in. uint8_t read_CR1 = 0x35;// read configuration registerHAL_GPIO_WritePin(sFLASH_CS_GPIO_PORT,sFLASH_CS_PIN,GPIO_PIN_RESET);__NOP();__NOP();__NOP();__NOP();__NOP();HAL_SPI_Transmit(&hspi1,&read_CR1,1,10000);__NOP();__NOP();__NOP();__NOP();__NOP();HAL_SPI_Receive(&hspi1,&read_data[0],10,10000);__NOP();__NOP();__NOP();__NOP();__NOP();HAL_GPIO_WritePin(sFLASH_CS_GPIO_PORT,sFLASH_CS_PIN,GPIO_PIN_SET);SO the confusing part is this. The read ID works just fine. Then any read after that the first few bytes of data are not pulled in correctly or shifted positions in the array. I am forced to bit bang this today. Out of time. Considering alternative brands just because of the recommended , supplied drivers are so poorly supported.I am not new at writing to SPI. Its one of the simplest things to do , the HAL driver makes it so overly complex its difficult to troubleshoot. If it worked...So no working example of a polling SPI (with HAL driver) to external memory? I just dont get it. Its the core of any CORTEX-M part implementation to have any non volatile memory yet not one example after 2 years. Come on man.....