2013-10-01 02:13 PM
2013-10-01 05:43 PM
Any particular board/phy?
How about a reset via ETH->DMABMR |= ETH_DMABMR_SR; then spinning while it's set2013-10-02 08:58 AM
2013-10-02 09:19 AM
Yeah, doing things at this level is a bit nuanced, the USB/Ethernet cores come from Synopsis, if I recall, and the documentation is best reviewed in context with the software demos. Assume the technical writers grasp neither the silicon or the software to the level that might be desirable.
There are likely external and internal clock dependencies, and certainly some conditions that expect certain clocks to be on and others off. The MAC/PHY are two separate parts, but are interdependent thus requiring the GPIO interfaces to be up. I did find your brute force assembler style to be somewhat amusing. <G>2013-10-02 09:49 PM
> the documentation is best reviewed in context with the software demos.
Nicely said. The documentation is crap. That the chip is hastily stitched up from purchased IPs, is no excuse. I am buying chips from ST, not from Synopsis, ARM, or whoever else contributed.> There are likely external and internal clock dependencies,
Indeed. My finding was, too, that the reset never finished until the external clock to MAC was available (in my case, the clock (I use external oscillator for RMII) got damped to nil due to poor design of the EVAL board, I reported on this forum). You might want to keep this in mind for failure diagnosis in production/service. IIRC, the example/''library'' employs a timeout in waiting for the reset to complete; and the application might provide an error message or other diagnostics upon this timeout, if applicable. JW