Erasing FLASH - What does really affect the wear?

[Tobe]

I was wondering, how a repeated erase over pages, that have been previously erased, but not written, would affect the lifetime of the FLASH.

[TDK]

This provides a good overview of hardware failure modes.

https://www.embedded.com/flash-101-errors-in-nand-flash/

When you erase a page, there is no internal check to ensure it isn't already erased. Thus, the erase will still degrade the FLASH and count towards the endurance limit. If you strictly erase the flash many times without programming, the endurance should be higher than if you're both erasing and programming, but it's not a useful metric to track.

[Tesla DeLorean]

Sure there are Masters and PhD thesis on these types of topics..

Beyond the charge issues on the cells, one can infer there's also a finite life on the charge-pump, used to place charge on the cells, and the high voltages generated internally to facilitate that. Goes to how they can offer 100K cycles on a smaller subset of the array, vs 10K more broadly

Going to also be difference when you mass erase, vs selective erase.

Erase and Write times increase as the arrays age / wear, and it becomes more difficult to change the charge state of the cells within the arrays.

On Micron NOR memories, and presumably others, the erase time drop significantly if the arrays have erased pages. One could infer the state-machines / code take efforts to reduce / minimize wear.

https://www.sciencedirect.com/science/article/abs/pii/S0026271411004495

https://nepp.nasa.gov/docuploads/4f678de9-9f55-4e2e-863df9c9f35db603/w-4_nguyen-flash%20memory.pdf