Showing results for 
Search instead for 
Did you mean: 

EOCS( End of conversion selection) bit in ADC of STM32F401RE

Associate II

Hello All,

    I am trying to write a baremetal code for ADC, to work in Continous SCAN mode. I needed help with a few bit in internal ADC peripheral in STM32F401RE




As per the RM, if EOCS is "1" then EOC is set for each conversion,

hence suppose L=2 and ADC is sampling A0,A1. As soon as Start of conversion is given 

1. A0 is sampled and loaded in DR, |->  EOC is set |->which is cleared as soon as I read DR

2.A1 is sampled and loaded in DR |->EOC is set |-> which is cleared on reading DR 

3. A0 is sampled and cycle continous.


In case were EOCS is "0" then it will set after A0,A1 are sampled i.e sequence is completed. However the internal ADC doesn't have a FIFO. 

1.So I think my logic is wrong. Can anyone please help me understand this? 

2.I tried this in code as well, just after first conversion, I am getting overflow in SR


Thank you