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Enabling TXP and RXP interrupts for SPI6 gives hard fault in STM32H757.?

JTari.1
Associate II
 
1 REPLY 1
JTari.1
Associate II

Running STM32H7 SPI6 using Low Level Drivers and in Interrupt mode. First time the SPI runs fine and EOT callback is called. If i try to enable the SPI once again for second transfer, while enabling TXP and RXP it gives me a hard fault. I am using the reference example from ST32CubeH7 package.

Following the example everything works as example. But when i try to perform second transaction, it gives hard fault.

By looking into the CFSR register in the core, it sets the BFARVALID and PRECISERR bits to 1. Can any one help?