Dynamic exception priority change in STM32 Cortex-M4

[Harish1]

I am using the timer interrupt and currently, it has priority 3 once I get into the ISR then I want to change the priority to 2. I have used like below but the priority not changing.

NVIC->IPR[6] |= NVIC_IPR6_PRI_25 & 0x22222222;

__dsb(0);

In above, __dsb(0) or __dsb(1) I am not getting?

I am using the Keil environment.

[gbm]

1. Don't do it. I'm 99% sure you don't need to change the priority.
2. Use NVIC_SetPriority() to change the priority. This should be done while the interrupt is disabled and not during its service.

[Tesla DeLorean]

Which STM32 part are we talking about?

What are the values in NVIC->IPR[6] before/after this operation?

Are there better ways of approaching the end goal?

[Harish1]

I am using STM32L475.

The existing priority is configured as NVIC->IPR[6] = 0x00003300 but I want to change this priority to 0x00002200 during ISR to get the nested interrupt functionality.

The main goal is here that implements the nested interrupt for the timer interrupt.

In the above figure, the timer counter goes into up-down mode and an interrupt generates for every counter equal to zero. When the 1st interrupt comes the function starts at T = 0 and ends at T=x as the size of the function is too large. If I don't use the 2nd interrupt, the functionality gets disturbed. And I want to update the comparator values in the 2nd interrupt that's it and I will return to the 1st interrupt and this will go to main.

 

As the interrupt is the same and as per NVIC the 1st interrupt completes and then only goes to 2n interrupt because of the same priority. I want to make the 2nd interrupt priority as 2 so that this has the highest priority and nested action come.

[Harish1]

But if the cortex m4 supports the dynamic exception priority change then why you are not suggesting implementing it?

I have already set the priority levels before ISR run but I want to make the nested to reach my goal as explained in the below anwere.

[Pavel A.]

There is a better way to do this, not using "gray zone" tricks.

When the 1st interrupt occurs, immediately trigger a software interrupt with lesser priority and return from the interrupt. From the ISR of the software interrupt call the "huge function". When the 2nd interrupt occurs, it will naturally preempt the "huge function".

[Piranha]

An ISR can have only one instance running. You will not get "another instance" of the same interrupt under any circumstances!

Normally longer processing is scheduled as a task to run in main code. But, if ti really need to be run in interrupt mode, then do it as the Pavel said - a software interrupt with a lower priority.

[Harish1 · Accepted solution]

I made a small mistake that's why it is not working and it is working now.

Thank you all.