2015-09-19 05:51 AM
A question for Clive (or anyone else who knows that).
If I understand right, DWT is a 32-bit timer with CPU frequency. If MCU doesn't have 32-bit timer or has only one and I need let say two of them, is it OK (allowed) to use DWT for some basic measurements?In some cases I would need a full resolution (72 MHz) for measuring longer periods (about a minute).Thanks #dwt #timer2015-09-19 06:40 AM
It's in all STM32 designs, and really a perfect way of measuring elapsed time, that it doesn't use or require interrupts is a significant benefit.
In other situations a 32-bit free-running counter can be used for the same, but as you say the F1 parts don't have 32-bit timers (something I've always scratched my head about), and the other parts typically only have 32-bit timers on the slower APB1 bus.In benchmarking I treat this very much like Intel's RDTSC (Read Time Stamp Counter) instruction.Not sure of the power consumption for enabling it, but there's less logic here than a 16-bit timer clocking off APB2.2015-09-19 07:22 AM
Thanks Clive.
As far as I know, DWT is primary related to ETM and ITM stuff for debugging. I'm constantly using that for real time testing. Do you think that only reading of a DWT count register would cause any problems while debugging? And one more question. Is there any meaningful reason why Systick count register is 24-bit wide and not 32? Is 32-bit counter so much harder to implement? 32-bit Systick would be much more useful I think.Thanks2015-09-19 08:15 AM
I think it's a combination of things, gate count, power consumption, and use case.
It's different than a free-running counter, there's a holding register, and a reset/load when it gets to zero, so it's comparing the counter bits, so there's some critical path considerations. It's nominally running a 1/8 the processor clock, and for 1 ms (1 KHz) periodic interrupts. Obviously people using it for other delays, but this is a hugely popular kind of rate. Something that runs seconds, or close to a minute, significantly less so.Large counters have to be broken into smaller pieces to be tested rapidly.ARM always tries to keep things simple. When pushed in to optional units, it doesn't have to impact the core has X gates kind of marketing, or uW/MHz