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DSP Sampling Rate, FFT Size, and Buffer Size

groufosse
Associate II
Posted on July 25, 2014 at 21:46

Hi,

Can someone please throw some ideas on what might be the problem with what I am seeing  / doing. Here are the relevant details.

1 - Using an STM32F407 processor (Discovery PCB), clock at 168Mhz

2 - Using ADC to sample low frequency signals (< 50Hz) from sensors

3 - Have timer interrupt set such that setting timer period to frequency will interrupt at that rate and add a sample from ADC to buffer. Using timestamps, I have confirmed that the interrupt is operating correctly

4 - I have a filter coefficient (400 taps) at Fs = 512Hz, and 1024Hz. The reason I'm using power of 2 values for sampling is so that when I divide the sampling rate into the FFT size, I should get 0.5Hz resolution. (according to resolution = Fs / Fn)

In the header, I have three &sharpdefines that control the interrupt operation:

&sharpdefine SAMPLE_FREQ

&sharpdefine BUFFER_SIZE

&sharpdefine FFT_SIZE

In the interrupt handler:

    if(sampleCount == BUFFER_SIZE)

    {

inputBufPtr = &ADC_Values[0];

outputBufPtr = &outputBuffer[0];

arm_fir_instance_f32 S;

arm_fir_init_f32(&S, FILTER_TAP_NUM, (float32_t  *)&filter_taps[0], &firStateF32[0], BLOCK_SIZE);

for(uint16_t i = 0; i < NUM_BLOCKS; i++)

{

arm_fir_f32(&S, inputBufPtr + (i * BLOCK_SIZE), outputBufPtr + (i * BLOCK_SIZE), BLOCK_SIZE);

}

if( FFT_SIZE == 512 )

arm_cfft_f32(&arm_cfft_sR_f32_len512, outputBuffer, ifftFlag, doBitReverse);

if( FFT_SIZE == 1024 )

arm_cfft_f32(&arm_cfft_sR_f32_len1024, outputBuffer, ifftFlag, doBitReverse);

else if( FFT_SIZE == 2048 )

arm_cfft_f32(&arm_cfft_sR_f32_len2048, outputBuffer, ifftFlag, doBitReverse);

/* Calculate the magnitude at each bin */

arm_cmplx_mag_f32(outputBuffer, cfftBuffer, FFT_SIZE);

//zero the DC component

cfftBuffer[0] = 0;

//do stuff here...look for bins of interest....

} //end: if (samplecount...

So this is where my questions are:

With the defines set to these values:

&sharpdefine SAMPLE_FREQ  512

&sharpdefine BUFFER_SIZE 2048

&sharpdefine FFT_SIZE 1024

And using the Dolph-Cheby filter coefficients for Fs = 512, with a 22Hz sensor signal into the ADC, here are the bin values from 1 to 25:

Power at 1 = 201.5

Power at 2 = 203.8

Power at 3 = 183.8

Power at 4 = 215.4

Power at 5 = 137.4

Power at 6 = 107.9

Power at 7 = 112.4

Power at 8 = 125.5

Power at 9 = 81.0

Power at 10 = 128.6

Power at 11 = 190.1

Power at 12 = 60.5

Power at 13 = 53.6

Power at 14 = 103.9

Power at 15 = 76.4

Power at 16 = 84.4

Power at 17 = 29.6

Power at 18 = 61.4

Power at 19 = 48.9

Power at 20 = 18.0

Power at 21 = 40.9

Power at 22 = 47.6

Power at 23 = 524.6

Power at 24 = 123.5

Power at 25 = 55.9

Power at 58 = 43.9

Power at 59 = 96.4

The sensor is signalling at precisely 22Hz, but the highest bin level is at 23, one higher than it should be.

Now, if I set the defines to these values:

&sharpdefine SAMPLE_FREQ  1024

&sharpdefine BUFFER_SIZE 2048

&sharpdefine FFT_SIZE 1024

And use the Dolph-Cheby filter coefficients for Fs = 1024, here are the new bin values (shown from 20 to 50):

Power at 21 = 197.2

Power at 22 = 64.0

Power at 23 = 81.5

Power at 24 = 70.8

Power at 25 = 72.8

Power at 26 = 49.3

Power at 27 = 31.5

Power at 28 = 37.9

Power at 29 = 7.5

Power at 30 = 18.7

Power at 31 = 20.3

Power at 32 = 30.4

Power at 33 = 17.6

Power at 34 = 27.1

Power at 35 = 67.4

Power at 36 = 28.9

Power at 37 = 12.6

Power at 38 = 29.6

Power at 39 = 14.5

Power at 40 = 52.4

Power at 41 = 46.9

Power at 42 = 44.1

Power at 43 = 21.2

Power at 44 = 28.1

Power at 45 = 89.8

Power at 46 = 311.5

Power at 47 = 236.7

Power at 48 = 83.2

Power at 49 = 54.1

Power at 50 = 35.7

The high bin has now moved to 46. Dividing by 2 and subtracting 1 it is 22, which again is correct.

Can someone provide some insight as to why this is? Any comments or suggestions would be appreciated.

 Thanks!

#dsp #adc #sampling-rate #timer-i
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