2019-03-14 04:06 AM
Hello,
an4013 Rev. 6 on page 21 writes:
"The Counter Enable signal is generated by a logic OR between CEN control bit and the trigger input when configured in gated mode."
while e.g. RM0351 writes:
"Enable the counter by writing CEN=1 in the TIMx_CR1 register (in gated mode, the
counter doesn't start if CEN=0, whatever is the trigger input level)."
This contradicts and probably AN4013 is wrong and should read "logic AND"
Solved! Go to Solution.
2019-03-21 08:06 AM
Hello @Uwe Bonnes ,
You are right, I confirm that the AN4013 is wrong. This sentence will be fixed in the next revision Rev7 which is about to be published in a few weeks.
Thanks again for pointing this error out.
Regards,
-Imen-
2019-03-21 08:06 AM
Hello @Uwe Bonnes ,
You are right, I confirm that the AN4013 is wrong. This sentence will be fixed in the next revision Rev7 which is about to be published in a few weeks.
Thanks again for pointing this error out.
Regards,
-Imen-