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DMA access on M7 Device

FMass.1
Associate III

I'm using a STM32H745 MCU, with two processors, one of which is an M7. With the M7 I have problems with the DMA, I have seen that it is a very discussed topic on the internet, where there are many solutions, but I still have some doubts: I would like to use the DMA with the UART, the first thing I tried to do is force the buffers into the RAM_D2 memory area:

 

__attribute__ ((section(".buffer"), used)) uint8_t TxBuf[1024];

 

and in flash.ld:

 

.buffer(NOLOAD) :
  {
    . = ALIGN (1);        
  } > RAM_D2

 

But it didn't work, Even just out of curiosity, know why?

Then in a post I found this other solution: Before every use of DMA, I use the function: SCB_InvalidateDCache_by_Addr, in this way:

 

SCB_InvalidateDCache_by_Addr((uint32_t*)(((uint32_t)rx_buffer) & ~(uint32_t)0x1F), SERIAL_BUFFER_SIZE+32);
  HAL_UARTEx_ReceiveToIdle_DMA(&DATA_INTERFACE, rx_buffer, SERIAL_BUFFER_SIZE);
  __HAL_DMA_DISABLE_IT(&hdma_usart3_rx, DMA_IT_HT);

 

or

 

SCB_CleanDCache_by_Addr((uint32_t*)(((uint32_t)tx_buffer) & ~(uint32_t)0x1F), SERIAL_BUFFER_SIZE+32);
HAL_UART_Transmit_DMA(&DATA_INTERFACE, tx_buffer, SERIAL_BUFFER_SIZE);

 

And it work!  But I have some questions:

1 - Can I use this method every time I use the DMA, for example I would need it to receive data from the I2C, just call the SCB_InvalidateDCache_by_Addr before using the DMA and is everything ok?

2 - Is this method ok, can it be used safely? Are there any contraindications or things to consider?

3 - Are there better, safer or more suitable methods to do these operations with DMA?

 

The last one is more of a curiosity than a question, but because in the article I found the SCB_InvalidateDCache_by_Addr is called like this:

 

SCB_CleanDCache_by_Addr((uint32_t*)(((uint32_t)tx_buffer) & ~(uint32_t)0x1F), SERIAL_BUFFER_SIZE+32);

 

instead of just like this:

 

SCB_CleanDCache_by_Addr((uint32_t *)tx_buffer, SERIAL_BUFFER_SIZE);

 

 

1 ACCEPTED SOLUTION

Accepted Solutions
TDK
Guru

You need to ensure your data buffer is aligned to cache boundary (32-bytes). The discrepancy between SERIAL_BUFFER_SIZE and SERIAL_BUFFER_SIZE+32  and the ~0x1F business is a hack which may cause issues later.

A general discussion on how to handle cache on the H7 is here:

https://community.st.com/t5/stm32-mcus/dma-is-not-working-on-stm32h7-devices/ta-p/49498

If you feel a post has answered your question, please click "Accept as Solution".

View solution in original post

1 REPLY 1
TDK
Guru

You need to ensure your data buffer is aligned to cache boundary (32-bytes). The discrepancy between SERIAL_BUFFER_SIZE and SERIAL_BUFFER_SIZE+32  and the ~0x1F business is a hack which may cause issues later.

A general discussion on how to handle cache on the H7 is here:

https://community.st.com/t5/stm32-mcus/dma-is-not-working-on-stm32h7-devices/ta-p/49498

If you feel a post has answered your question, please click "Accept as Solution".