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Differences in Flash Error Occurrence by Code Location(SRAM,DTCM) in STM32H7

Odoong
Associate II

Hi, I found a pretty interesting issue while developing an STM32H7 Series MCU.

And I tried many things to figure out the cause but failed. T^T

 

If you have experienced similar symptoms or know anything about them, I hope we can discuss it together here.

 

Subject : Differences in Flash Error Occurrence by Code Location(SRAM,DTCM) in STM32H7

Model : STM32H7A3ZI

Spec : Internal Flash Memory  (2MByte / Bank 1,2 each 1MBtye)

            Internal SRAM (1MByte)

            DTCM (128KByte)

            External RAM

 

 

I wanted to be able to erase the Flash area where the code was loaded during code execution(for a Firmware Update), so I followed the steps below.

 

First, store the Binary File in a Buffer located on the external Ram, and verify that it is normal.

Second, execute the code I designed and perform Flash Erase/Write with the corresponding buffer data.

Last, reboot the system when flash write is compete.

 

Here, the code is based on the HAL code provided by STM, and only slightly modified as needed. (For example, changing to Wait by Count Up, an internal variable, rather than Tick during Wait operation, etc.)

 

Now, when I put that code (executive file .O) in DTCM and repeatedly test it, I occasionally get a flash error (usually an RDP error ). The frequency of errors was random, but it was about once every 50,000 times. In the event of this error, all Flash operations are blocked without additional action, which is fatal to the system.

However, when I placed the same code in SRAM and performed iterative test, no problem was found.

 

I've solved the problem, but I'm posting this on the community because I want to find out the cause. Any opinions are helpful to me. Please feel free to give me your opinion. Thank you.

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