DFSDM and external Sigma Delta Modulator

[ABouk.2]

Hi,

I currently have a STM32L4R9VI (that contains the DFSDM + DMA) and I am planning to sample an IF signal ( up to 10 MHz frequency) using an external Sigma Delta Modulator AMC1305M05 (20Msps - 20 MHz frequency - 16 bits resolution). I am not an expert in DFSDM so I would like to know if and how it's possible to get 1 sample per clock edge (16 bits) in a single line.

Thanks in advance,

[Peter BENSCH · Accepted solution]

Unfortunately, you mixed up the sampling frequency and the bit clock; your requirements do not even come close to the data of all of the components you have in mind.

The 20MHz input frequency of the AMC1305 is not the sampling frequency (i.e. of the 16-bit values) but the frequency at which the individual bits of the samples are transferred. The same applies to the DFSDM module within the STM32.

According to Nyquist, an IF signal of 10MHz would require a sampling frequency of at least 20MHz, which would result for 16bits in a bit clock of more than 320MHz, where an LVDS or faster interface would be necessary.

Summary: the selected ADC AFE and DFSDM cannot be used for such high-frequency signals with such high resolution.

Regards

/Peter

[ABouk.2]

I understand now, thank you !