2015-10-28 03:27 PM
Hi,
In my design I'm using an external 24.576 MHz oscilator as I2S clock source
Acoording to the reference manual, for 32 bit frames and MCLK output:F
S
= I2SxCLK / [(32*2)*((2*I2SDIV)+ODD)*4)]
ForFs = 96 KHz, this gives
I2SDIV = 0, ODD = 1.However, in the CubeMX configuration tab this shows an error:''With this I2S Clock (24.576 MHz), the divider value(0) is too low to obtain the desired audio frequency(96.0 KHz).The I2S Clock must be higher than (86.016 MHz).''I don't understand where this 86.016 MHz is coming from.Is there something happening between the external input pin and the I2S clock generator that I'm missing? Or is this a bug in CubeMX?2024-07-15 11:18 AM - edited 2024-07-15 11:18 AM
I know it's almost a decade old thread.
My colleague today played with I2S in CubeMX with a 'F427, set 12.288MHz at the dedicated I2S_CLK pin, and with an attempted setting of 192kHz sampling frequency it wrote something about the divider (which it calculated to be 0, fair enough) is not good, and at least 43.008MHz is required.
That's an oddly specific, yet very strange value.
I faintly remembered I've already seen something along these lines - and lo and behold, found this thread, exactly twice that value, 84.016MHz.
CubeMX was updated today (with several "funny" stories related to surprising changes in controls and behaviour).
We don't really care (more precisely, we really don't care) at this point; just mentioned it as just another fun fact.
JW