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CubeMX 6.12.1 generates faulty peripheral_clock_config STM32H753

JohVis71
Associate

Hello Everyone

I encounter a problem with clock initialization for STM32H753V for peripheral clocks.
I found a similar thread periphcommonclockconfig-when-adc-clocked-by-pll3 dealing with a similar thing, but mine is different:

I have a very simple project with STM32H753VITx via CubeIDE 1.16.0 using CubeMX 6.12.1
I only uses usart2 to transmit something. 

JohVis71_0-1728299997856.png
USART2 is the only one using PLL2. 
Because it is the only peripheral using PLL2, there is no PerpheralCommonClockConfig. The Clock is initialized within HAL_UART_MspInit:

 

void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
{

  GPIO_InitTypeDef GPIO_InitStruct = {0};
  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
  if(uartHandle->Instance==USART2)
  {
  /* USER CODE BEGIN USART2_MspInit 0 */

  /* USER CODE END USART2_MspInit 0 */

  /** Initializes the peripherals clock
  */
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART2;
    PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_PLL2;
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
    {
      Error_Handler();
    }

    /* USART2 clock enable */
    __HAL_RCC_USART2_CLK_ENABLE();

    __HAL_RCC_GPIOD_CLK_ENABLE();

 

The clock configuration for PLL2 is missing all settings for the prescalers and PLLs
If I enable something else also using PLL2 (like CAN), PerpheralCommonClockConfig is generated and it looks like this:

 

void PeriphCommonClock_Config(void)
{
  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};

  /** Initializes the peripherals clock
  */
  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_FDCAN
                              |RCC_PERIPHCLK_USART2;
  PeriphClkInitStruct.PLL2.PLL2M = 2;
  PeriphClkInitStruct.PLL2.PLL2N = 40;
  PeriphClkInitStruct.PLL2.PLL2P = 8;
  PeriphClkInitStruct.PLL2.PLL2Q = 6;
  PeriphClkInitStruct.PLL2.PLL2R = 2;
  PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_2;
  PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE;
  PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
  PeriphClkInitStruct.FdcanClockSelection = RCC_FDCANCLKSOURCE_PLL2;
  PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_PLL2;
  PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;
  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
  {
    Error_Handler();
  }

 

This one correctly contains all PLL prescaler and multiplier settings. 

Back to the version from before, USART2 being the only one using PLL2
If I add this piece of code manually:

JohVis71_1-1728300646469.png

Then the UART gets the correct clock and is working fine. 

It looks like a bug to me in CubeMX 6.12.1. 
I either config the PLL manually myself, or I make sure, that there are always more than one peripheral using PLL2
Please comment. Is this a bug?
IOC-file attached
Thank you 
Johannes

2 REPLIES 2
TDK
Guru

Yes, seems like a bug.

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STTwo-32
ST Employee

Hello @JohVis71 and welcome to the ST Community 

I think it is a regression. I've escalated for correction on the coming releases of the CubeMX (under internal ticket number 193028).

Best Regards.

STTwo-32

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