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Cortex M4 check and clear instruction?

Mikk Leini
Senior
Posted on July 07, 2015 at 22:32

I'm using FreeRTOS on STM32F4 with ARM-GCC and i need to do some interrupt/task protection for a simple flag checking and clearing function. Here's an example:

int
flag;
// Some code sets flag to 1 sometimes
int
checkFlagOnce(
void
)
{
int
status = 0;
if
(osMutexWait(Mutex, osWaitForever) == osOK)
{
status = flag;
flag = 0;
(
void
)osMutexRelease(Mutex);
}
return
status;
}

However the mutex code seems to be bit of an overkill. So i was thinking if the Cortex M4 has some special instruction (and ARM-GCC has a intrinsic function) which reads/checks and clears memory atomically? I checked the instruction set at ARM site but i couldn't find anything like that so i'm double checking. Or does somebody have a better idea how this could be done fast and simple? ...except global interrupts disabling/enabling. #cortex-instruction
2 REPLIES 2
Posted on July 07, 2015 at 23:07

I checked the instruction set at ARM site but i couldn't find anything like that so i'm double checking.

Nothing jumping to mind, the architecture is inherently load/store, with different instructions doing the loading and storing. Bit-banding also isn't helpful. Not sure if the ITx instructions are divisible.
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Mikk Leini
Senior
Posted on July 12, 2015 at 18:17

Actually there are such instructions :)

I found a very good post:

https://www.doulos.com/knowhow/arm/Hints_and_Tips/Implementing_Semaphores/

ARM has some pages:

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0553a/BABHCIHB.html

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dht0008a/ch01s03s03.html

ARM-GCC intrinsic function start with __LDREX.

Now i just need to try it out :)