Contact DRAM operation using STM32H723ZGT6 OSPI1

[GGIL.1]

Hello

We are working on a new project with STM32H723ZGT6.

I want to control S70KL1283DPBHI020 DRAM with HYPERBUS communication using OSPI1.

If you access 0X900000 memory to write and read data during the current operation, the data will not be read accurately.

It seems necessary to check if there is a problem in the circuit diagram.

I'm using PC2_C pin and PC3_C pin for IO5,6, is it not a problem?

Is it not a problem to use the RESET PIN as a GPIO OUT PIN to give a HIGH signal

I gave the data a value of 0xff up to 100 bytes, but there is another value in the 4th address.

I would like to ask you to check the problem.

Thank you.

[NesrynELMK]

Hello @GGIL.1 

1) I'm using PC2_C pin and PC3_C pin for IO5,6, is it not a problem? 

=> These pins do not have an alternate function for OCTOSPI, so yes, this is a problem.

2) Is it not a problem to use the RESET PIN as a GPIO OUT PIN to give a HIGH signal

=> Yes, you can use it this way.

3) I gave the data a value of 0xff up to 100 bytes, but there is another value in the 4th address.

 => This is expected, because there is no DATA5 and DATA6.

[GGIL.1]

Thank you for your answer.
So I jumped and moved PC2_C pin and PC3_C pin to PE8, PE9.

But the results are the same.

Could there be another reason.

Thank you.

[NesrynELMK]

@GGIL.1 ,

Please check the OCTOSPI configuration and the HyperBus timing parameters, such as:
     • initial latency (7 cycles)
     • read/write recovery time (36 ns @ 166 MHz)
     • latency mode (fixed latency)

Have you tried reading the device ID and the configuration registers of the memory?

In addition, please start with a low OSPI frequency and check whether the issue is still present.

Kind regards,