2020-06-19 07:36 AM
Hi,
If I configure all AXI-SRAM as write-thru.From the performance point of view, Is the same as disable DCACHE?
2020-06-19 03:58 PM
Read my post carefully. The alignment requirement is only for the data on which invalidation will be done - receive buffers. Cleaning can be done on any data, including the receive buffers, if needed.