Changing boot address of CM4 and CM7 in STM32H745 - Dual core

[uREG]

Hello Tesla

I need to run M4 from 0x08000000  and then M7 from 0x08100000.

Is there any example ?

Exactly I v'done my BOOT that runs on M4 (0x08000000) loads the Flash , then jumps into M4 (0x08040000).

Now i have to run M7 from 0x08100000, but i don't know how...

Please help :)

[mƎALLEm]

Hello @uREG and welcome to the community.

I moved your post from this one to a new thread as it's not the same question.

You can manage that in the linker file:

CM7:

MEMORY
{
FLASH (rx)      : ORIGIN = 0x08100000, LENGTH = 2048K
RAM (xrw)      : ORIGIN = 0x24000000, LENGTH = 512K
ITCMRAM (xrw)      : ORIGIN = 0x00000000, LENGTH = 64K
}

CM4:

MEMORY
{
FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 1024K
RAM (xrw)      : ORIGIN = 0x10000000, LENGTH = 288K
}

In system_stm32h7xx.c, you need to modify the vector table offset address in such way you swap the addresses between CM4 and CM7 VTOR addresses.

For CM4: (BANK1)

SCB->VTOR = FLASH_BANK1_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ 

For CM7: (BANK2)

SCB->VTOR = FLASH_BANK2_BASE | VECT_TAB_OFFSET;       /* Vector Table Relocation in Internal FLASH */

 And for performance purposes, in stm32h7xx_hal.c don't forget to change the ART base address according to the BANK1 address:

HAL_StatusTypeDef HAL_Init(void)
{

uint32_t common_system_clock;

#if defined(DUAL_CORE) && defined(CORE_CM4)
   /* Configure Cortex-M4 Instruction cache through ART accelerator */
   __HAL_RCC_ART_CLK_ENABLE();                   /* Enable the Cortex-M4 ART Clock */
   __HAL_ART_CONFIG_BASE_ADDRESS(0x08000000UL);  /* Configure the Cortex-M4 ART Base address to the Flash Bank 1 : */
   __HAL_ART_ENABLE();                           /* Enable the Cortex-M4 ART */
#endif /* DUAL_CORE &&  CORE_CM4 */

[uREG]

Hello SofLit and thank You for the answer.

The changes in linker files i've just done, also the ART relocation.

The changes in 'system_stm32h7xx_dualcore_boot_cm4_cm7.c' file are debatable, because the file is common for CM4 and CM7 parts in STM32CubeIDE and i suppose the directives 'CORE_CM4' and 'CORE_CM7' made in Preprocessor menu [Properties-Tool Settings-MCU GCC Compiler-Preprocessor] are invisible !

So I've done #define CORE_CM4 directly in that file, but this excludes CORE_CM7.

All this #defines politics in Attolic/CubeIDE is unclear for me...

But - what should I do in main.c files of both parts ?

Thanks,

Bartek.

[CRoch.2]

Hi Bartek,

did you manage to solve the problem? I am trying to do the same thing, the CM4 started correctly in debug mode and wait but when I launch CM7 it runs directly without halt and addres starts with 0x801... which is not correct.

If you got it running, can you please share your solution?

Thank you in advance.

Rocha

[uREG]

Hello Rocha.

No, I didn't. I'm still waiting in deadlock.

I have received such an info from STM Partner:

// Ensure CM7 is held in reset
RCC->AHB1RSTR |= RCC_AHB1RSTR_CM7RST;

// Set vector table for CM7
SCB->VTOR = 0x08100000; // Address for CM7 vector table

Release the CM7 Core from Reset

// Release CM7 from reset
RCC->AHB1RSTR &= ~RCC_AHB1RSTR_CM7RST;

but...there is no such bit in RCC->AHB1RSTR register...  :(

Can someone help us ?

Bartek.

[Michael3368]

Did you change the Boot address Option Bytes (BOOT_CM7_ADD0, BOOT_CM7_ADD1) through the CubeProgrammer?

Or, uncheck the BCM7 or BCM4 User Configuration Option Bytes so one of the processors doesn't start automatically and then programmatically start the processor with

__STATIC_INLINE void LL_RCC_ForceCM7Boot(void)

{

SET_BIT(RCC->GCR, RCC_GCR_BOOT_C1);

}

or

__STATIC_INLINE void LL_RCC_ForceCM4Boot(void)

{

SET_BIT(RCC->GCR, RCC_GCR_BOOT_C2);

}

[uREG]

Hello Michael3368.

Thank You for Your answer.

I've just tried to uncheck the BCM7 in CubeProgrammer and

...I've lost connection with my PCB.

I cant' reconnect again... What to do now ?

[Michael3368]

Sorry about the confusion. I was more asking what you had tried rather than giving advice on what to try.

There is apparently a bug in CubeProgrammer with the BCM4 bit (and I guess the BCM7 bit as well based on your experience).  I found this current thread while trying to find the answer to my problem.  I later found the thread about the BCMx bits here.

https://community.st.com/t5/stm32cubeprogrammer-mcus/stm32cubeprog-stm32h7xx-option-bytes-user-configuration/td-p/776879

My guess is that the CubeProgrammer isn't reading or writing the correct bits for BCM4/BCM7.  The CLI version of the programmer also doesn't work for the BCM4 bit, so it isn't just a GUI issue.  My unchecked the BCM4 bit on one board, and now the CM4 doesn't seem to work.

I have not seen a way to have one core put the other processor in reset. I have seen that you can have one processor put itself in sleep mode waiting for an interrupt, and then use the semaphore bit from the other processor to wake it up. I'm using that, and it seems to be working.
In response to this thread, I've successfully changed the start address in linker and cube programmer and vector table address in startup c code for CM7 and have that code running from a different address, so that is possible.

[uREG]

Thank You once again for Your comprehensive answer.

After some nervous hours I've received such a command line procedure from a friend:

C:\Program Files\STMicroelectronics\STM32Cube\STM32CubeProgrammer\bin STM32_Programmer_CLI.exe -c port=SWD mode=UR ap=3 -ob BCM7=1

and this saved my PCB to fife again :)

I will analize Your answer also.

The documentation of this problem is very poor and it seems to be done poorly at the beginning...