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Can't get the STM32H753 ADC to work with DMA in cubemx

Martin Sigrand
Associate
Posted on April 19, 2018 at 15:45

I try to configure ADC + DMA continues cicrcular mode for a H753eval board with CubeMX but with no success.

The example en.stm32cubeh7\STM32Cube_FW_H7_V1.2.0\Projects\STM32H743I_EVAL\Examples\ADC\ADC_DMA_Transfer works perfect but as I have started using cubemx for my other peripherals I would like to stay with cubemx, but I don't get it to work with the ADC+DMA.

Now I have backed to a completely clean project for a 753XI, only configured ADC1_IN0 and RCC(25MHz->400MHz sysclk and 18.75MHz ADC clk).

When I run it as ADC con't mode without DMA

0690X0000060AgBQAU.png

and add the following to my main.c, everything works.

#include ''main.h''

#include ''stm32h7xx_hal.h''

ADC_HandleTypeDef hadc1;

uint16_t adcData;

void SystemClock_Config(void);

static void MX_GPIO_Init(void);

static void MX_ADC1_Init(void);

int main(void)

{

HAL_Init();

SystemClock_Config();

MX_GPIO_Init();

MX_ADC1_Init();

HAL_ADC_Start(&hadc1);

while (1)

{

adcData = HAL_ADC_GetValue(&hadc1);

But when I change ADC1 config in cubemx to:

0690X0000060AgGQAU.png

added a DMA1 stream0, with circular mode and changed the rows in my code to:

ALIGN_32BYTES (static uint16_t adcData[32] );

HAL_ADC_Start_DMA(&hadc1,(uint32_t*)adcData,32)

and no code in main()

Nothing works! If a check adc.dr register with the debugger it only takes one value at start-up and nothing more.

I've also fiddled with the Conversion Data Management mode as that parameter is a little unclear to me, circular mode is set in the DMA tab as well and the youtube clips I have seen is using older parts/version which doesn't have that setting.

I've also tried for hours to compare the code generated with the one in the Project/__ /Example to find the problem but without success.

using cubemx 4.25.0

Some ideas anyone??

Thx / Martin

2 REPLIES 2
Martin Sigrand
Associate
Posted on April 20, 2018 at 11:45

Solution found: cubemx, at least for H753 and EWARM generates 0x20000000 as default RAM area in the linker file(stm32h753xx_flash.icf) and that is the DTCM-RAM which is not accessible from the standard DMA. 

Where is the ICF editor referred to below, I did edit the file for now!

/*###ICF### Section handled by ICF editor, don't touch! ****/

/*-Editor annotation file-*/

/* IcfEditorFile='$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml' */

/*-Specials-*/

define symbol __ICFEDIT_intvec_start__ = 0x08000000;

/*-Memory Regions-*/

define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;

define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF;

/*define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;

define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF;*/

define symbol __ICFEDIT_region_RAM_start__ = 0x24000000;

define symbol __ICFEDIT_region_RAM_end__ = 0x2407FFFF;

define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000;

define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x0000FFFF;

/*-Sizes-*/

define symbol __ICFEDIT_size_cstack__ = 0x400;

define symbol __ICFEDIT_size_heap__ = 0x200;

/**** End of ICF editor section. ###ICF###*/

define memory mem with size = 4G;

define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];

define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];

define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__];

define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };

define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };

initialize by copy { readwrite };

do not initialize { section .noinit };

place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };

place in ROM_region { readonly };

place in RAM_region { readwrite,

block CSTACK, block HEAP };
Posted on April 20, 2018 at 13:40

>>the DTCM-RAM which is not accessible from the standard DMA. 

Diagramming suggest the plumbing is there, and the DTCM-RAM is viable for SDMMC DMA operation, which is less problematic from a caching/sharing/coherency standpoint

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