2020-10-08 11:28 PM
I'm not having any time critical routines so I'm hoping of using all of the MCU's 1MB of RAM for data. As I understand from the RM, RAM is organized in a several banks. Can it be used as a continuous chunk of 1MB for data?
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2020-10-09 12:43 AM
Hi, @Siniša Marović
no, according to the RM0433, section 2.4 Embedded SRAM the largest contigouos SRAM block is the AXI one at 0x2400'0000 with a size of 0x8'0000 (512K). You will also find some gaps called Reserved between some of the blocks, which makes it impossible to address the entire 1MB as one block - it also contains ITCM/DTCM and Backup RAM.
Maybe you should consider to use the STM32H7B0 or STM32H7A3 which provide 1MB AXI SRAM?
Regards
/Peter
2020-10-09 12:43 AM
Hi, @Siniša Marović
no, according to the RM0433, section 2.4 Embedded SRAM the largest contigouos SRAM block is the AXI one at 0x2400'0000 with a size of 0x8'0000 (512K). You will also find some gaps called Reserved between some of the blocks, which makes it impossible to address the entire 1MB as one block - it also contains ITCM/DTCM and Backup RAM.
Maybe you should consider to use the STM32H7B0 or STM32H7A3 which provide 1MB AXI SRAM?
Regards
/Peter
2020-10-09 01:46 AM
That's exactly what I need. It's a shame I didn't find that MCU before, since it does not show in mouser's search. Now I already bought the H750 so I'll have to figure out how to use it. The thing I'm most concerned about is LTDC. Is it possible to have LDC memory point to non-contigouos SRAM block? And can I use AHB bus for DMA transfers instead of AXI?
2020-10-09 02:07 AM
Please be so kind and open another thread for the question about LTDC as it looks like the original question has been answered, right?
Regards
/Peter
2020-10-09 05:34 AM
Yes, that's fine.