CAN FIFO0 and FIFO1 stm32f429

[kruft]

Posted on June 14, 2018 at 08:37

Hello,

Could you describe difference in use FIFO0 and FIFO1 for CAN1 and CAN2 in stm32f4 mcu? For example if I configure CAN2 for receive in FIFO0 and configurate filters 14 all work success, but if I try use FIFO1 with CAN2 no interrupt CAN2 happen in receive in this case. CAN0 need use with FIFO0 and CAN2 need use with FIFO1 if big data transfer happen, isn't it(or what case when need use separately FIFO for CAN1 and CAN2)?

[kruft]

Posted on June 14, 2018 at 12:49

But with FIFO0 CAN2 work correctly, with FIFO1 no interrupts in CAN2.

[T J]

Posted on June 14, 2018 at 12:52

why are your bank and filter numbers so high ?

what page in the reference manual is that on ?

this is your work,

did you see my bank and filter numbers ?

[kruft]

Posted on June 14, 2018 at 13:08

As I know bank number for CAN1: 0...13 CAN2: 14...27 . In reference manual didn't find full description about it, only phrase that bank number 'shared between CAN1 and CAN2' at page 1076 of 

http://www.st.com/content/ccc/resource/technical/document/reference_manual/3d/6d/5a/66/b4/99/40/d4/DM00031020.pdf/files/DM00031020.pdf/jcr:content/translations/en.DM00031020.pdf

 

[Tesla DeLorean]

Posted on June 14, 2018 at 13:40

The split point is programmable.

[Tesla DeLorean]

Posted on June 14, 2018 at 13:43

Like I said not something I can readily check today, but I would suspect the HAL implementation over that of the IP, they got the IP from Synopsys who have significantly more rigor in their design methodology/philosophy than ST.

[kruft · Accepted solution]

Posted on June 15, 2018 at 09:36

Thank you for good discussion I solved it. FIFO1 didn't work because I don't create CAN2_RX1_IRQHandler() I have only 

CAN2_RX0_IRQHandler() and not permit CAN2_RX1 interrupts. I didn't take note that needed 2 different interrupt handlers for FIFO0 and FIFO1 in my opinion it's strange struct organisation because we have 1 CAN_RxCplt handler and 2 same CAN2_RX0 and CAN2_RX1 interrupt handlers.

[T J]

Posted on June 15, 2018 at 11:09

happy to help