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CAN-FD stops mid-frame for higher data rates

Konami
Senior

I'm trying to setup a CAN-FD example with data rate switching (1MHz nom, 8MHz data) on an STM32G0B1. It seems to work up to 4MHz, but when I decrease my divisor to get to 8MHz, the CAN frames just stop after the arbitration.

Here's my init code that works for 4MHz data. If I change hfdcan1.Init.DataPrescaler to = 1, things break.

    hfdcan1.Instance                  = FDCAN1;
    hfdcan1.Init.ClockDivider         = FDCAN_CLOCK_DIV1;
    hfdcan1.Init.FrameFormat          = FDCAN_FRAME_FD_BRS;
    hfdcan1.Init.Mode                 = FDCAN_MODE_NORMAL;
    hfdcan1.Init.AutoRetransmission   = DISABLE;
    hfdcan1.Init.TransmitPause        = ENABLE;
    hfdcan1.Init.ProtocolException    = DISABLE;
    hfdcan1.Init.NominalPrescaler     = nom_divisor;
    hfdcan1.Init.NominalSyncJumpWidth = 1;
    hfdcan1.Init.NominalTimeSeg1      = 13;
    hfdcan1.Init.NominalTimeSeg2      = 2;
    hfdcan1.Init.DataPrescaler        = 2;//data_divisor;
    hfdcan1.Init.DataSyncJumpWidth    = 1;
    hfdcan1.Init.DataTimeSeg1         = 6;
    hfdcan1.Init.DataTimeSeg2         = 1;
    hfdcan1.Init.StdFiltersNbr        = 1;
    hfdcan1.Init.ExtFiltersNbr        = 1;
    hfdcan1.Init.TxFifoQueueMode      = FDCAN_TX_FIFO_OPERATION;
    if (HAL_FDCAN_Init(&hfdcan1) != HAL_OK)
    {
        Error_Handler();
    }

Here's what it looks like when it breaks


_legacyfs_online_stmicro_images_0693W00000bjzdlQAA.png 

The bus has 2x TI transceiver, terminated on both ends. Any idea why the data stops sending when the data rate switch should occur or any suggestions on how to debug this?

1 ACCEPTED SOLUTION

Accepted Solutions
Konami
Senior

I believe this was due to missing the below from the output of CubeMX. See the STM32G0Cxx FDCAN examples for more details.

    /* Configure and enable Tx Delay Compensation, required for BRS mode.
     TdcOffset default recommended value: DataTimeSeg1 * DataPrescaler
     TdcFilter default recommended value: 0 */
    if (HAL_FDCAN_ConfigTxDelayCompensation(&hfdcan1, CAN_DELAYCOMP, 0) != HAL_OK)
    {
        Error_Handler();
    }
 
    if (HAL_FDCAN_EnableTxDelayCompensation(&hfdcan1) != HAL_OK)
    {
        Error_Handler();
    }

View solution in original post

2 REPLIES 2
Konami
Senior

I should add, that I'm kind of suspecting the timing settings as the culprit, because when I use the recommended timing numbers from Kvaser, I see the same behavior even at 4MHz. I don't believe I'm violating the limits of these values but perhaps I'm missing something else

Konami
Senior

I believe this was due to missing the below from the output of CubeMX. See the STM32G0Cxx FDCAN examples for more details.

    /* Configure and enable Tx Delay Compensation, required for BRS mode.
     TdcOffset default recommended value: DataTimeSeg1 * DataPrescaler
     TdcFilter default recommended value: 0 */
    if (HAL_FDCAN_ConfigTxDelayCompensation(&hfdcan1, CAN_DELAYCOMP, 0) != HAL_OK)
    {
        Error_Handler();
    }
 
    if (HAL_FDCAN_EnableTxDelayCompensation(&hfdcan1) != HAL_OK)
    {
        Error_Handler();
    }