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Can brownout and power-on reset causes be discriminated on the STM32G4?

CTapp.1
Associate III

I am trying to use the flags within the RCC CSR register to determine if my system has started due to a power-on or brownout reset. However, BORRSTF is set for both types of reset, and the G4 does not have a separate POR reset cause flag.

I have tried using PINRSTF as well, but it looks as if that is also always set.

I think my only option is to set the brownout level to generate a reset, and to use the PVD (set to a higher level) to give me a pre-warning of failure - but that is not ideal, as I want to be able to report a brownout even when the system resumes normal operation.

1 REPLY 1
Pierre_Paris
ST Employee

Hello @CTapp.1,

Thank you for your question.

 

The  power-on reset (POR) / power-down reset (PDR) are coupled with a brown-out reset (BOR) circuitry. They are integrated together.

Q1 : "BORRSTF is set for both types of reset"

  • This flag is set every time a BOR occurs.
  • PDR cannot be differentiated from BOR (is always higher than PDR level).
  • The reset value is 0C000000 and BORRSTF is set by default. The BOR keeps the device under reset until Vdd reaches the threshold Vborx. 
  • BOR occurs when a PDR occurs. If the voltage drops under VPDR, that means the VBOR0 threshold has been crossed also.

Q2 : "I want to be able to report a brownout even when the system resumes normal operation."

 

  • First, you need to clean the RMVF (Bit 23) of RCC_CSR
  • Poll BORRSTF and if it's set, a BOR occurs.
  • The pre-warning with PVD works.
  • As a reset generated by a BOR does not affect the RAM content, you can use the RAM to retain a PVD event. Make sure that PVD threshold is higher than BOR threshold to have enough time to write the value.
    • In case of a PDR occurs, the RAM content is lost 
    • In case of a BOR without PDR, the RAM is preserved.

 

Best Regards,

Pierre

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