Can anyone please provide schematic for I-NUCLEO-LRWAN1 ? - thanks

[Nic Burkinshaw]

Posted on July 14, 2017 at 14:14

Just purchased 2 I-NUCLEO-LRWAN1 - they look to be great. I would really like to know hardware details about the jumpers and connectors.

Specifically, I would like to access serial TX/RX for the USI module.

Thanks in advance!

[Tesla DeLorean]

Posted on July 14, 2017 at 15:16

Pretty sure the primary serial to the AT commands is through the D0/D1 pins of the shield connector.

PM me your email address for the schematic. The Murata part has the newer radio and larger L0 part.

[Tesla DeLorean]

Posted on July 14, 2017 at 15:16

USI WM-SG-SM-42
 1 GND
 2 PA8/RCC_MCO
 3 PB10/LPUART_T
X 4 PB2/LPTIM1_OUT
 5 PA7/ADC_IN7
 6 PA1/COMP1_INP ??
 7 VREF+
 8 GND
 9 VDDA
10 PB5/LPTIM1_IN1
11 PA0/SYS_WKUP1
12 GND
13 GND
14 GND
15 GND 
16 GND
17 GND
18 GND
19 GND
20 MICRO_RST_N
21 PA9/RF_RST (SX1272)
22 PA2/DIO0 (SX1272)
23 PA3/DIO1 (SX1272)
24 PA5/DIO2 (SX1272)
25 PA6/DIO3 (SX1272)
26 PA10/DIO4 (SX1272) ??TYPO NOT PA1
27 DIO5 (SX1272) ??
28 BOOT0
29 GND
30 VDD_RFS
31 VDD_RFS
32 GND
33 VDD_3V3
34 VDD_3v3
35 GND
36 PB3/SPI1_SCK (SX1272)
37 PB4/SPI1_MISO (SX1272)
38 PA12/SPI_MOSI (SX1272)
39 PA15/SPI1_NSS (SX1272)
40 GND
41 GND
42 GND
43 PB8/RF_SW_CTRL2
44 PA4/RF_SW_CTRL1
45 GND
46 GND
47 RF_OUT (TEST, HAS U.FL)
48 GND
49 PB7/I2C1_SDA
50 PB6/I2C1_SCL
51 PA13/SWDIO
52 PA14/SWCLK
53 PB1/ADC_IN9
54 PA11/COMP1_OUT
55 PB11/LPUART_R
X56 PB0/ADC_IN8
57 GND
..
81 GND

STM32L052T8Y6 (WLCSP 36)
 1 A1 PA13 (SWDIO)
 2 A2 PA15 (SPI1_NSS) SX1272
 3 A3 PB4 (SPI_MISO) SX1272
 4 A4 PB7 (I2C1_SDA)
 5 A5 VDD 
 6 A6 PC14 (OSC32_IN)
 7 B1 PA12 (SPI1_MOSI) SX1272
 8 B2 PA14 (SWCLK)
 9 B3 PB3 (SPI1_SCK) SX1272
10 B4 PB6 (I2C1_SCL)
11 B5 PB8 (RF_SW_CTRL2)
12 B6 PC15 (OSC32-OUT)
13 C1 PA10 DIO4 SX1272
14 C2 PA11 (COMP1_OUT)
15 C3 PB1 (ADC_IN9)
16 C4 PB5 (LPTIM1_IN1)
17 C5 BOOT0
18 C6 NRST
19 D1 PA9 RF_RST SX1272
20 D2 PB11 (LPUART_RX)
21 D3 PB0 (ADC_IN8)
22 D4 PA0 (SYS_WKUP1)
23 D5 VDDA
24 D6 VSS
25 E1 PA8 (MCO)
26 E2 PB10 (LPUART_TX)
27 E3 PA6 DIO3 SX1272
28 E4 PA4 (RF_SW_CTRL1)
29 E5 PA2 DIO0 SX1272
30 E6 VREF+
31 F1 VDD
32 F2 PB2 (LPTIM1_OUT)
33 F3 PA7 (ADC_IN7)
34 F4 PA5 DIO2 SX1272
35 F5 PA3 DIO1 SX1272
36 F6 PA1 (COMP1_IN) �?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?�?

[Nic Burkinshaw]

Posted on July 14, 2017 at 15:42

Great! -thanks

[Nic Burkinshaw]

Posted on July 14, 2017 at 16:25

Hi Clive,

D0/D1 works fine – thanks

Did you mean to attach a schematic to your email – none was received and I am still trying to figure out the JP1-4, JP12, etc.

With thanks and best regards,

Nic

[Nesrine M_O]

Posted on July 14, 2017 at 17:14

Nic Burkinshaw wrote:

Great! -thanks

https://community.st.com/0D50X00009bMM5DSAW

 

[Tesla DeLorean]

Posted on July 14, 2017 at 17:53

Email should have contained a Google Drive link, can see it in the Sent Mail here, so perhaps Outlook ate it, PM'd the link to you here

[Enrico Maria Dani]

Posted on September 28, 2017 at 07:30

Hi Clive, can I have the schematic?

thanks in advance.

Regards

Enrico