2017-12-04 01:58 PM
RM0038 Reference manual states on page 188 that GPIOx_BRR register is available for Cat. 3 product - which includes both stm32l100rc and stm32l152rc (page 40 of Reference manual).
But code below works when used BSRR and does not when used BRR register on stm32l152rc (similarly for stm32l100rc when port changed to GPIOC and pins to 8 and 9).
#include 'stm32l1xx.h'
void delay(uint32_t del);
#define DELAY_VAL 100000int main(void){
RCC->AHBENR |= RCC_AHBENR_GPIOBEN;GPIOB->MODER = GPIO_MODER_MODER6_0 | GPIO_MODER_MODER7_0;GPIOB->OSPEEDR = GPIO_OSPEEDER_OSPEEDR6_Msk | GPIO_OSPEEDER_OSPEEDR7_Msk;while (1){
//GPIOB->BSRR = (GPIO_BRR_BR_6 | GPIO_BRR_BR_7) << 16;GPIOB->BRR = GPIO_BRR_BR_6 | GPIO_BRR_BR_7;
delay(DELAY_VAL); GPIOB->BSRR = GPIO_BSRR_BS_6; delay(DELAY_VAL); GPIOB->BSRR = GPIO_BSRR_BS_7; delay(DELAY_VAL); }}void delay(uint32_t del){
uint32_t i; for(i=0;i<del;i++){};}Am I doing something wrong? Thanks.
Solved! Go to Solution.
2017-12-18 09:32 AM
Hello
upratathlavu
,You are right about this confusion.
The request is raised internally to correct the reference manual and update thechapter: '7.4.11 GPIO bit reset register (GPIOx_BRR) (x = A..H)' to remove 'Cat.3' from description.
So final sentence shouldbe:These registers are available on Cat.4, Cat.5 and Cat.6 products only.
Our team is aware about this error and should fix this in the coming release of reference manual.
Thank you for your contribution.
Best Regards
Imen
2017-12-18 09:32 AM
Hello
upratathlavu
,You are right about this confusion.
The request is raised internally to correct the reference manual and update thechapter: '7.4.11 GPIO bit reset register (GPIOx_BRR) (x = A..H)' to remove 'Cat.3' from description.
So final sentence shouldbe:These registers are available on Cat.4, Cat.5 and Cat.6 products only.
Our team is aware about this error and should fix this in the coming release of reference manual.
Thank you for your contribution.
Best Regards
Imen