BOOSTEN / BOOSTRDY doesn't seem to be working on STM32U575

[ShawnP]

STM32u575 reference mannual indicates that PWR->VOSR BOOSTEN must be set and PWR->VSOR BOOSTRDY must be set by hardware before clocks are raised past 55MH.

using this code to try and accomplish that:

	// set boost enable to support clocks above 55MHZand wait for BOOSTRDY
	MODIFY_REG(PWR->VOSR, PWR_VOSR_BOOSTEN, PWR_VOSR_BOOSTEN);
	while (READ_BIT(PWR->VOSR, PWR_VOSR_BOOSTRDY) != PWR_VOSR_BOOSTRDY) {}

I see BOOSTEN getting set but loop hangs and BOOSTRDY is never set by hardware.

Is there some other item that need to be configured for this to work?

All assistance approciated.

Shawn

[Sarra.S]

Hello @ShawnP 

In the section 10.5.4 Dynamic voltage scaling management you will find the required sequence to use the EPOD (embedded power distribution) booster , indeed it is mandatory to follow it.

>>the BOOSTRDY bit does not get set until after MSIS is enabled

I think it is not mandatory that the PLL source is MSI, it can also be HSI or HSE, but PLL must be enabled with clock selected as explained in the sequence.

>>it's strange that I don't see the sample applications setting BOOSTEN yet having no difficulting running at 160MHZ...

the fact that they are running properly does not mean it will always work properly. When increasing the frequency, the consumption of all logic supplied by VCORE increases, and the consumption depends on the number of enabled peripherals, their frequency, the process and the temperature.

The behavior above 55 MHz, whatever enabled peripherals and PVT conditions  are only  guaranteed if Booster is enabled. It does not mean that it cannot work in typical conditions, but it is not guaranteed.

>>Regarding your question about PLL dividers; 

The booster needs a clock between 4 and 16 MHz, as explained in 10.5.4 Dynamic voltage scaling management . PLL1MBOOST divider is only used to generate the booster clock at required frequency. There is no link with the PLL1 division and multiplication factors. The PLL input clock is used because we are sure that the PLL is already used when frequency is increased above 55 MHz, so we can reuse the PLL input source selection instead of another source selection just for the booster.

I hope that makes things a bit clearer!