2025-11-10 11:05 PM - last edited on 2025-11-11 2:04 AM by mƎALLEm
Bit-banding Alternatives for Modern ARM Cores
Background Information:
The bit-banding feature available in ARM Cortex-M cores (ARMv7-M architecture including Cortex-M3 and Cortex-M4) provides hardware-level mapping of individual bits within a 1 MB memory region to words in a 32 MB alias region. This mechanism enables atomic bit manipulation without requiring read-modify-write operations.
Specific Query:
For ARM Cortex cores beyond M7 architecture that do not support the bit-banding feature, could you please provide detailed information regarding:
Solved! Go to Solution.
2025-11-11 12:34 AM - edited 2025-11-11 2:03 AM
Hello,
Indeed bit-banding is not available on Cortex-M7. According to ARM community from this post, the reason is the following:
Regarding an available alternative, I think the only solution is to use CMSIS:
void atomic_set_bit(volatile uint32_t *addr, uint32_t bit) {
uint32_t old, status;
do {
old = __LDREXW(addr);
old |= (1U << bit);
status = __STREXW(old, addr);
} while (status != 0);
}
Use __LDREXW/__STREXW for 32-bit, __LDREXH/__STREXH for 16-bit, and __LDREXB/__STREXB for 8-bit operations.
I don't think there is specific documentation regarding this subject
2025-11-11 12:34 AM - edited 2025-11-11 2:03 AM
Hello,
Indeed bit-banding is not available on Cortex-M7. According to ARM community from this post, the reason is the following:
Regarding an available alternative, I think the only solution is to use CMSIS:
void atomic_set_bit(volatile uint32_t *addr, uint32_t bit) {
uint32_t old, status;
do {
old = __LDREXW(addr);
old |= (1U << bit);
status = __STREXW(old, addr);
} while (status != 0);
}
Use __LDREXW/__STREXW for 32-bit, __LDREXH/__STREXH for 16-bit, and __LDREXB/__STREXB for 8-bit operations.
I don't think there is specific documentation regarding this subject
2025-11-11 2:53 AM - edited 2025-11-11 2:55 AM
@Komal_Y wrote:
- Available alternative methods for atomic bit manipulation
Check if your particular chip has a register (or registers) to give atomic bit manipulation; eg,
That's for STM32H723/733, STM32H725/735 and STM32H730:
PS:
You'll probably find that HAL uses this - it certainly does for F0.
2026-01-06 10:02 PM
Hello ,
Can u please tell me this for 32 bit.. is it same.. can u give me one example how to access single bit of port without bit banding
2026-01-06 11:30 PM
@Komal_Y wrote:Hello ,
Can u please tell me this for 32 bit.. is it same.. can u give me one example how to access single bit of port without bit banding
GPIO ports only cover 16 bits each.
2026-01-07 3:01 AM
@Komal_Y wrote:example how to access single bit of port without bit banding
As I said, look to see if there is a register for this.
I showed the example of the BSRR register for GPIO ...
Some processors also have a BRR; eg, STM32F030:
2026-01-07 3:22 AM
Hello,
Cortex-M bit banding feature is something, GPIO pin bit banding is something else in STM32 even it could be done with ARM-bit banding.
Your question was about ARM bit banding and my answer was about that feature. Now if your question about GPIO pin you need to use BRR/BSRR registers to set/reset atomically a GPIO pin as described by @Andrew Neil .
2026-01-07 3:24 AM - edited 2026-01-07 3:25 AM
GPIO->BSRR is ideal as it allows set/reset to occur at a singular clock edge, instead of the RMW which is going to take 8 or more cycles, and whatever the slower bus and write buffers add.
It's hard for Peripherals to be Atomic as they generally aren't Memory but combinations logic and clocked at different rates.
TIM->SR was a register that allows for you to clear bits with a single write rather than a RMW, but care still needs to be taken to only clear bits you've specifically noted as set, else you can miss events, as the peripheral is independent and can clock faster than the bus it is attached too.
One needs to read the RM carefully to notice the nuances of the design.
2026-01-07 3:26 AM
@Komal_Y Do you have a specific use case where the lack of Bit-banding is actually causing you real-life problems?
I guess the reason Bit-Banding has been abandoned is probably because there are (very?) few cases where it really brings any actual real-life benefits?
eg, see Bit-Banding in ARM Cortex-M: A Brilliant Feature… But why was it abandoned?
As previously noted, where it is really useful for register-related functions, it's usually implemented in the hardware itself.
So, if you have a real use case, please describe it - then people may be able to give specific answers to that particular question ...
2026-01-07 3:30 AM - edited 2026-01-07 3:34 AM
The Reference Manual (RM) and Programming Manual (PM) are things you want to read, absorb and understand.
Joseph Yiu has a number of books that cover the practical aspects in a less dry way than the cores Technical Reference Manual (TRM) or ST's PM.
Bit Banding (BB) had a lot of issues, traps and hazards for the unwary to fall into. Often not being atomic, and being less efficient than more optimal design approaches.