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back up domain on STM32H735 is reseted after reset

dacha.1
Associate II

Hello we try to use the backup sram on 0x3880 0000 .

We have build the software :

#define BKPSRAM_BASE 0x38800000UL
#define BKPSRAM_SIZE 0x1000UL

typedef enum
{
BkpSram_Init     = 0 ,
BkpSram_Wait     = 1 ,
BkpSram_WriteStr = 2 ,
BkpSram_ReadStr  = 3 ,
BkpSram_Read8    = 4 ,
BkpSram_Write8   = 5 ,
BkpSram_Read16   = 6 ,
BkpSram_Write16  = 7 ,
BkpSram_Read32   = 8 ,
BkpSram_Write32  = 9 ,
BkpSram_Reset    = 10 ,
}En_BackupSramCmd;

typedef struct
{
uint32_t counter;
float temperature;
char name[16];
} Bkp_StrTest;

Bkp_StrTest BkpStr_Test = { 42, 25.5f, "STM32H735" };

Bkp_StrTest BkpStr_Read = { 0};



typedef struct

{

En_BackupSramCmd Cmd;

Bkp_StrTest *StrTest;

Bkp_StrTest *StrRead;

}Str_BackupTest;



Str_BackupTest BackupTest;



void BackupSRAM_Test(void)

{

Str_BackupTest* this =&BackupTest;



switch(this->Cmd)

{

default:

HAL_PWR_EnableBkUpAccess();

HAL_PWREx_EnableBkUpReg();

while ((PWR->CR2 & PWR_CR2_BRRDY) == 0) {}



this->StrTest = &BkpStr_Test;

this->StrRead = &BkpStr_Read;

this->Cmd = BkpSram_Wait;

break;



case BkpSram_Wait:

break;



// ecrire une structure

case BkpSram_WriteStr:

this->Cmd = BkpSram_Wait;

BackupSRAM_WriteBuffer(0, this->StrTest, sizeof(Bkp_StrTest));

break;



// relire une structure

case BkpSram_ReadStr:

this->Cmd = BkpSram_Wait;

BackupSRAM_ReadBuffer(0, this->StrRead, sizeof(Bkp_StrTest));

break;



case BkpSram_Reset:

this->Cmd = BkpSram_Wait;

NVIC_SystemReset();

break;
}
}
 

 

The BackupSRAM_WriteBuffer and BackupSRAM_ReadBuffer is OK

but when we send the Cmd NVIC_SystemReset()and

read the backup register with BackupSRAM_ReadBuffer(...) the Read is all data at 0

--> this means that reset have kill my write

--> WHY ?

 


Edited to apply source code formatting - please see How to insert source code for future reference.

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