ARMv4 instruction "ADC R0, R1, LSL #1" not recognized

[Hansel]

I am using STM32CubeIDE 1.15.0, writing code in C, including some assembler code, for the STM32G431.

According to ST's programming manual PM0214 in Section 3.5.1, I should be allowed to use

adc r0, r1, lsl #1

However, gcc barfs (I am using standard gnu18) with the following message:

garbage following instruction -- 'adc r0,r1,lsl#1'

What am I missing?

[gbm]

You are missing register name before lsl.

[Tesla DeLorean · Accepted solution]

These forms ALL work in KEIL

  234 00000008 EB40 0041       adc              r0,r1,lsl#1
  235 0000000C EB40 0041       adc.w            r0, r0, r1, lsl #1
  236 00000010 EB40 0041       ADC              r0,r0,r1,LSL #1

Will poke GNU/GAS later..

[Hansel]

Thanks, guys, for helping me out. It works now!

[Tesla DeLorean]

The version of GAS I'm using found these latter two were acceptable

 121 0034 40EB4100 	 adc.w            r0, r0, r1, lsl #1
 122 0038 40EB4100 	 ADC              r0,r0,r1,LSL #1

objdump -d yielded this form, which is the form I'd choose for re-assembly

  34:	eb40 0041 	adc.w	r0, r0, r1, lsl #1
  38:	eb40 0041 	adc.w	r0, r0, r1, lsl #1

[Tesla DeLorean]

I'm a little disappointed than GNU/GAS won't handle the short/truncated version.

I tend to use KEIL / ARMASM to rebuild recovered source, and I do find the syntax differences between tools to be frustrating at times. Although I guess I'd prefer it error than fail to generate the right opcodes